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ST7FLCD1 Datasheet(PDF) 61 Page - STMicroelectronics |
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ST7FLCD1 Datasheet(HTML) 61 Page - STMicroelectronics |
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61 / 95 page  61/95 ST7FLCD1 Display Data Channel Interfaces (DDC) Figure 32: DDC Interface Overview Figure 33: DDC Interface Block Diagram SDAD SCLD SDA SCL Hardware DDC2B Interface I²C Slave Interface (DDC/CI - Factory Alignment) Data Register (DR) Data Shift Register Comparator Status Register 1 (SR1) DDC/CI Factory Control Register (CR) Control Logic Status Register 2 (SR2) Interrupt Data Control SCLD SDAD DDC/CI (for Monitor Adjustment and Control) DDC2B (for Monitor Identification) Address High Data Control Own Address Register 1 (OAR1) DDC/CI Address Low Control Logic DDC2B Interrupt DDC2B Controller DMA Control Logic Address/Data Data Shift Register DDC2B Control Register (DCR) Hardware Address Own Address Register 2 (OAR2) |
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