LP3971 datasheet(39/52 Pages) TI1

39 / 52 page

VCC_RTC

nRSTO

nBATT_FLT

SYS_EN

High-Volt_PD

nRESET_OUT

PWR_EN

Low-Volt_PD

13 MHZ_OSC

PXA27x Output

3,4.

9,10.

Main Batt

VIN

BU Batt

VIN

LP3971

www.ti.com

SNVS432V – JANUARY 2006 – REVISED MAY 2013

turns on and supplies a stable output voltage to the VCC_BATT pin of the Applications processor (initiating

the power-on reset event) with nRSTO asserted from the LP3971 to the processor.

2. nRSTO de-asserts after a minimum of 50 mS.

3. The Applications processor waits for the de-assertion of nBATT_FLT to indicate system power (VIN) is

available.

4. After system power (VIN) is applied, the LP3971 de-asserts nBATT_FLT. Note that BOTH nRSTO and

nBATT_FLT need to be de-asserted before SYS_EN is enabled. The sequence of the two signals is

independent of each other.

5. The Applications processor asserts SYS_EN, the LP3971 enables the system high-voltage power supplies.

The Applications processor starts its countdown timer set to 125 mS.

6. The LP3971 enables the high-voltage power supplies.

–

LDO1 power for VCC_MVT (Power for internal logic and I/O Blocks), BG (Bandgap reference voltage),

OSC13M (13 MHz oscillator voltage) and PLL enabled first, followed by others if delay is on.

7. Countdown timer expires; the Applications processor asserts PWR_EN to enable the low-voltage power

supplies. The processor starts the countdown timer set to 125 mS period.

8. The Applications processor asserts PWR_EN (ext. pin or I2C), the LP3971 enables the low-voltage

regulators.

9. Countdown timer expires; If enabled power domains are OK (I2C read) the power up sequence continues by

enabling the processors 13 MHz oscillator and PLL’s.

10. The Applications processor begins the execution of code.

Note that BOTH nRSTO and nBATT_FLT need to be de-asserted before SYS_EN is enabled. The sequence of the

two signals is independent of each other and can occur is either order.

POWER-ON TIMING

Symbol

Description

Min

Typ

Max

Units

Delay from VCC_RTC assertion to nRSTO de-assertion

Delay from nBATT_FLT de-assertion to nRSTI assertion

100

µS

Submit Documentation Feedback

Product Folder Links: LP3971

LP3971 Datasheet(PDF) 39 Page - Texas Instruments

LP3971 Datasheet(HTML) 39 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL