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TLV320DAC23IPWR Datasheet(PDF) 16 Page - Texas Instruments |
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TLV320DAC23IPWR Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 38 page ![]() 2−6 2.4.3 Three-Wire Control Interface (SDI) PARAMETER MIN TYP MAX UNIT tw(5) Clock pulse duration, SCLK High 20 ns tw(6) Clock pulse duration, SCLK Low 20 ns tc(3) Clock period, SCLK 80 ns tsu(4) Clock rising edge to CS rising edge, SCLK 60 ns tsu(5) Setup time, SDIN to SCLK 20 ns th(4) Hold time, SCLK to SDIN 20 ns tw(7) Pulse duration, CS High 20 ns tw(8) Pulse duration, CS Low 20 ns LSB tw(8) tc(3) tw(6) tw(5) tsu(4) th(4) tsu(5) CS SCLK DIN Figure 2−4. Three-Wire Control Interface Timing Requirements 2.4.4 Two-Wire Control Interface PARAMETER MIN TYP MAX UNIT tw(9) Clock pulse duration, SCLK High 1.3 µs tw(10) Clock pulse duration, SCLK Low 600 ns f(sf) Clock frequency, SCLK 0 400 kHz th(5) Hold time (start condition) 600 ns tsu(6) Setup time (start condition) 600 ns th(6) Data hold time 900 ns tsu(7) Data setup time 100 ns tr Rise time, SDIN, SCLK 300 ns tf Fall time, SDIN, SCLK 300 ns tsu(8) Setup time (stop condition) 600 ns SCLK DIN tw(9) tw(10) th(5) th(6) tsu(7) tsu(8) Figure 2−5. Two-Wire Control Interface Timing Requirements |
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