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TMS320C6472ECTZ Datasheet(PDF) 175 Page - Texas Instruments |
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TMS320C6472ECTZ Datasheet(HTML) 175 Page - Texas Instruments |
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175 / 269 page ![]() CLKIN3 2 3 4 4 5 1 TMS320C6472 www.ti.com SPRS612G – JUNE 2009 – REVISED JULY 2011 7.10.4 PLL3 Controller Input and Output Clock Electrical Data/Timing Table 7-48. Timing Requirements for CLKIN3 Devices (see Figure 7-37) 500/625/700 PLL MODE NO. UNIT x20 MIN MAX 1 tc(CLKIN3) Cycle time, CLKIN3 37.5 50 ns 2 tw(CLKIN3H) Pulse duration, CLKIN3 high 0.4 * tc(CLKIN3) ns 3 tw(CLKIN3L) Pulse duration, CLKIN3 low 0.4 * tc(CLKIN3) ns 4 tt(CLKIN3) Transition time, CLKIN3 1.2 ns 5 tJ(CLKIN3) Period jitter (peak-to-peak), CLKIN3 100 ps Figure 7-37. CLKIN3 Timing Copyright © 2009–2011, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 175 Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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