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TMS570LS1114 Datasheet(PDF) 103 Page - Texas Instruments

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Part # TMS570LS1114
Description  16- and 32-Bit RISC Flash Microcontroller
PDF  169 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS570LS1114 Datasheet(HTML) 103 Page - Texas Instruments

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TMS570LS1114
www.ti.com
SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015
Table 6-36. Reset/Abort/Error Sources (continued)
ESM HOOKUP
ERROR SOURCE
SYSTEM MODE
ERROR RESPONSE
group.channel
N2HET1
Memory parity error
User/Privilege
ESM
1.7
N2HET2
Memory parity error
User/Privilege
ESM
1.34
MIBSPI
MibSPI1 memory parity error
User/Privilege
ESM
1.17
MibSPI3 memory parity error
User/Privilege
ESM
1.18
MibSPI5 memory parity error
User/Privilege
ESM
1.24
MIBADC
MibADC1 Memory parity error
User/Privilege
ESM
1.19
MibADC2 Memory parity error
User/Privilege
ESM
1.1
DCAN
DCAN1 memory parity error
User/Privilege
ESM
1.21
DCAN2 memory parity error
User/Privilege
ESM
1.23
DCAN3 memory parity error
User/Privilege
ESM
1.22
PLL
PLL slip error
User/Privilege
ESM
1.10
PLL #2 slip error
User/Privilege
ESM
1.42
CLOCK MONITOR
Clock monitor interrupt
User/Privilege
ESM
1.11
DCC
DCC1 error
User/Privilege
ESM
1.30
DCC2 error
User/Privilege
ESM
1.62
CCM-R4
Self test failure
User/Privilege
ESM
1.31
Compare failure
User/Privilege
ESM => NMI => nERROR
2.2
VIM
Memory parity error
User/Privilege
ESM
1.15
VOLTAGE MONITOR
VMON out of voltage range
n/a
Reset
n/a
CPU SELFTEST (LBIST)
CPU Selftest (LBIST) error
User/Privilege
ESM
1.27
PIN MULTIPLEXING CONTROL
Mux configuration error
User/Privilege
ESM
1.37
POWER DOMAIN CONTROL
PSCON compare error
User/Privilege
ESM
1.38
PSCON self-test error
User/Privilege
ESM
1.39
eFuse CONTROLLER
eFuse Controller Autoload error
User/Privilege
ESM => nERROR
3.1
eFuse Controller - Any bit set in the error status register
User/Privilege
ESM
1.40
eFuse Controller self-test error
User/Privilege
ESM
1.41
WINDOWED WATCHDOG
WWD Non-Maskable Interrupt exception
n/a
ESM => NMI => nERROR
2.24
ERRORS REFLECTED IN THE SYSESR REGISTER
Power-Up Reset
n/a
Reset
n/a
Oscillator fail / PLL slip(2)
n/a
Reset
n/a
(2)
Oscillator fail/PLL slip can be configured in the system register (SYS.PLLCTL1) to generate a reset.
Copyright © 2012–2015, Texas Instruments Incorporated
System Information and Electrical Specifications
103
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