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ER3110DI Datasheet(PDF) 21 Page - Altera Corporation |
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ER3110DI Datasheet(HTML) 21 Page - Altera Corporation |
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21 / 23 page ![]() Page 21 Enpirion Power Datasheet ER3110DI Wide PVIN 1A Synchronous Buck Regulator May 2014 Altera Corporation Layout Considerations Proper layout of the power converter will minimize EMI and noise and insure first pass success of the design. PCB layouts are provided in multiple formats on the Altera Enpirion web site. In addition, Figure 50 will make clear the important points in PCB layout. In reality, PCB layout of the ER3110DI is quite simple. A multi-layer printed circuit board with GND plane is recommended. Figure 50 shows the connections of the critical components in the converter. Note that capacitors CIN and COUT could each represent multiple physical capacitors. The most critical connections are to tie the PGND pin to the package GND pad and then use vias to directly connect the GND pad to the system GND plane. This connection of the GND pad to system plane insures a low impedance path for all return current, as well as an excellent thermal path to dissipate heat. With this connection made, place the high frequency MLCC input capacitor near the PVIN pin and use vias directly at the capacitor pad to tie the capacitor to the system GND plane. The boot capacitor is easily placed on the PCB side opposite the controller IC and 2 vias directly connect the capacitor to BOOT and SW. Place a 1µF MLCC near the AVINO pin and directly connect its return with a via to the system GND plane. Place the feedback divider close to the FB pin and do not route any feedback components near SW or BOOT. If external components are used for SS, COMP or FSW the same advice applies. L1 COUT CVIN CSS RFS FIGURE 50. PRINTED CIRCUIT BOARD POWER PLANES AND ISLANDS RFSW CSS CPVIN L1 COUT 0.47” 10038 May 28, 2014 Rev A |
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