MPC8272CVRB datasheet(18/56 Pages) MOTOROLA

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MPC8272 PowerQUICC II™ Family Hardware Speciﬁcations

MOTOROLA

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

AC Electrical Characteristics

Figure 7 shows TDM input and output signals.

Figure 7. TDM Signal Diagram

Figure 8 shows PIO and timer signals.

Figure 8. PIO and Timer Signal Diagram

Serial CLKin

TDM input signals

TDM output signals

sp20

sp21

sp40/sp41

Note: There are four possible TDM timing conditions:

1. Input sampled on the rising edge and output driven on the rising edge (shown).

2. Input sampled on the rising edge and output driven on the falling edge.

3. Input sampled on the falling edge and output driven on the falling edge.

4. Input sampled on the falling edge and output driven on the rising edge.

Sys clk

PIO/IDMA/TIMER[TGATE assertion] input signals

IDMA output signals

sp22

sp23

sp42/sp43

TIMER(sp42/43)/ PIO(sp42a/sp43a)

sp42a/sp43a

output signals

sp42/sp43

TIMER input signal [TGATE deassertion]

sp22

sp23

Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.

(See note)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MPC8272CVRB Datasheet(PDF) 18 Page - Motorola, Inc