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ST72561 Datasheet(PDF) 12 Page - STMicroelectronics |
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ST72561 Datasheet(HTML) 12 Page - STMicroelectronics |
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12 / 262 page  ST72561 12/262 3 REGISTER & MEMORY MAP As shown in Figure 5, the MCU is capable of ad- dressing 64K bytes of memories and I/O registers. The available memory locations consist of 128 bytes of register locations, up to 2 Kbytes of RAM and up to 60 Kbytes of user program memory. The RAM space includes up to 256 bytes for the stack from 0100h to 01FFh.The highest address bytes contain the user reset and interrupt vectors. IMPORTANT: Memory locations marked as “Re- served” must never be accessed. Accessing a re- seved area can have unpredictable effects on the device. Figure 5. Memory Map Table 2. Hardware Register Map 0000h RAM Program Memory (60K, 32K,16K) Interrupt & Reset Vectors HW Registers 0080h 007Fh 0FFFh (see Table 2) 1000h FFDFh FFE0h FFFFh (see Table 8) 0880h Reserved 087Fh Short Addressing RAM (zero page) 256 Bytes Stack 16-bit Addressing RAM 0100h 01FFh 027Fh 0080h 0200h 00FFh 1000h 32 KBytes 60 KBytes FFDFh 8000h (2048/1024/ or 047Fh 16 KBytes C000h 512 Bytes) or 087Fh Address Block Register Label Register Name Reset Status Remarks 0000h 0001h 0002h Port A PADR PADDR PAOR Port A Data Register Port A Data Direction Register Port A Option Register 00h1) 00h 00h R/W 2) R/W 2) R/W 2) 0003h 0004h 0005h Port B PBDR PBDDR PBOR Port B Data Register Port B Data Direction Register Port B Option Register 00h1) 00h 00h R/W 2) R/W 2) R/W 2) 0006h 0007h 0008h Port C PCDR PCDDR PCOR Port C Data Register Port C Data Direction Register Port C Option Register 00h1) 00h 00h R/W 2) R/W 2) R/W 2) 0009h 000Ah 000Bh Port D PDDR PDDDR PDOR Port D Data Register Port D Data Direction Register Port D Option Register 00h1) 00h 00h R/W 2) R/W 2) R/W 2) 000Ch 000Dh 000Eh Port E PEDR PEDDR PEOR Port E Data Register Port E Data Direction Register Port E Option Register 00h1) 00h 00h R/W 2) R/W 2) R/W 2) |
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