ST92185B datasheet(160/178 Pages) STMICROELECTRONICS

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ST92185B - VOLTAGE SYNTHESIS TUNING CONVERTER (VS)

VOLTAGE SYNTHESIS (Cont’d)

7.8.3 Register Description

DATA

AND

CONTROL

(VSDR1)

R254 - Read/Write

Reset Value: 0000 0000 (00h)

Bit 7 = VSE:

VS enable bit.

0: VS Tuning Converter disabled (i.e. the clock is

not forwarded to the VS counter and the 2 out-

puts are set to 1 (idle state)

1: VS Tuning Converter enabled.

Bit 6 = VSWP:

VS Output Select

This bit controls which VS output is enabled to out-

put the VS signal.

0: VSO1 output selected

1: VSO2 output selected

Bit 5:0 = VD[13:8]

Tuning word bits.

These bits are the 6 most significant bits of the

Tuning word forming the PWM selection. The

VD13 bit is the MSB.

DATA

AND

CONTROL

(VSDR2)

R255 - Read/Write

Reset Value: 0000 0000 (00h)

Bit 7:0 = VD[7:0]

Tuning word bits.

These bits are the 8 least significant data bits of

the VS Tuning word. All bits are accessible. Bits

VD6 - VD0 form the BRM pulse selection. VD7 is

the LSB of the 7 bits forming the PWM selection.

76543210

VSE

VSWP

VD13

VD12

VD11

VD10

VD9

VD8

VD7

VD6

VD5

VD4

VD3

VD2

VD1

VD0

ST92185B Datasheet(PDF) 160 Page - STMicroelectronics

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