HD66773R datasheet(13/133 Pages) RENESAS

13 / 133 page

HD66773R

Rev.1.10, Jun.21.2003, page 13 of 133

Signals

Number

of Pins

I/O

Connected

Functions

VcomH

Stabilizing

Capacitor

Vcom high level generated during Vcom AC drive. Connect to a

stabilizing capacitor.

VcomL

Stabilizing

Capacitor or

open

The Vcom level without Vcom AC drive, and Vcom low level with

Vcom AC drive. The voltage can be adjusted with internal register

setting. Connect to a stabilizing capacitor. VcomL output is

halted when VCOMG bit is LOW, and in this case, stabilizing

capacitor is not necessary.

VgoffOUT

Vgoff or

Open

Output power supply for gate drive. Internal register setting

enables AC drive in synchronization with Vcom. Make an

appropriate setting for the structure of hold capacitor of TFT

display. Output the amplitude VcomH-VcomL in reference to

VgoffL with AC drive.

Vgoff

VgoffOUT or

power

supply

TFT gate off level. Negative voltage. Connect to VgoffOUT or

otherwise, connect to external voltage power supply of VGL or

more.

VgoffH

Stabilizing

Capacitor or

open

VgoffOUT high level with Vgoff AC drive. Connect to a stabilizing

capacitor. The Vgoff output is halted when CAD bit is LOW. In

this case, no stabilizing capacitor is necessary.

VgoffL

Stabilizing

Capacitor

VgoffOUT without Vgoff AC drive, and VgoffOUT low level with

Vgoff AC drive. The voltage can be adjusted with internal register

setting. Connect to a stabilizing capacitor.

V0P

V31P

I/O

Stabilizing

Capacitor

Output from positive-polarity internal operational amplifier when

the internal operational amplifier is turned on. Connect to a

stabilizing capacitor.

V0N

V31N

I/O

Stabilizing

Capacitor

Output from negative-polarity internal operational amplifier when

the internal operational amplifier is turned on. Connect to a

stabilizing capacitor.

VGS

GND or

external

resistor

Reference voltage for grayscale voltage generating circuit. Place

a variable resistor externally when adjusting a level for each

panel.

S1–S396

396

LCD

Source output signal. The shift direction of segment signal is

changeable with SS bit:

SS = 0, RAM address 0000 is output from S1.

SS = 1, it is output from S396.

S1, S4, S7, ... display red (R), S2, S5, S8, ... display green (G),

and S3, S6, S9, ... display blue (B) (SS = 0).

G1-176

176

LCD

Gate output signal. Output VGH level to select a gate line, and

output Vgoff level not to select a gate line.

GTEST1-2

LCD or

Open

Dummy gate output signal. Output the VGH level to select a gate

line, and output the Vgoff level not to select a gate line when CAD

bit is High. Output the Vgoff level not to select a gate line when

CAD bit is Low. Leave open when not used.

TESTA1

I/O

Stabilizing

Capacitor or

Open

A test pin for the VcomH output. Leave it open or connect to a

stabilizing capacitor if necessary depending on the quality of

display.

TESTA2

I/O

Stabilizing

Capacitor or

Open

A test pin for the VcomL output. Leave it open or connect to a

stabilizing capacitor if necessary depending on the quality of

display.

TESTA3

I/O

Stabilizing

Capacitor or

Open

A test pin for the Vgoff output. Leave it open or connect to a

stabilizing capacitor if necessary depending on the quality of

display.

HD66773R Datasheet(PDF) 13 Page - Renesas Technology Corp

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