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DS8813D Datasheet(PDF) 21 Page - Richtek Technology Corporation

Part # DS8813D
Description  Multi-Phase PWM Controller with PWM-VID Reference
PDF  23 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

DS8813D Datasheet(HTML) 21 Page - Richtek Technology Corporation

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RT8813D
21
DS8813D-00
September 2016
www.richtek.com
©
Copyright 2016 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
Output Capacitor Selection
The output filter capacitor must have ESR low enough to
meet output ripple and load transient requirement, yet have
high enough ESR to satisfy stability requirements. Also,
the capacitance must be high enough to absorb the inductor
energy going from a full load to no load condition without
tripping the OVP circuit. Organic semiconductor
capacitor(s) or special polymer capacitor(s) are
recommended.
MOSFET Selection
The majority of power loss in the step-down power
conversion is due to the loss in the power MOSFETs. For
low voltage high current applications, the duty cycle of
the high side MOSFET is small. Therefore, the switching
loss of the high side MOSFET is of concern. Power
MOSFETs with lower total gate charge are preferred in
such kind of application.
However, the small duty cycle means the low side MOSFET
is on for most of the switching cycle. Therefore, the
conduction loss tends to dominate the total power loss of
the converter. To improve the overall efficiency, the
MOSFETs with low RDS(ON) are preferred in the circuit
design. In some cases, more than one MOSFET are
connected in parallel to further decrease the on-state
resistance. However, this depends on the low side
MOSFET driver capability and the budget.
Figure 14. Derating Curve of Maximum Power
Dissipation
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
25
50
75
100
125
Ambient Temperature (°C)
Four-Layer PCB
Thermal Considerations
The junction temperature should never exceed the
absolute maximum junction temperature TJ(MAX), listed
under Absolute Maximum Ratings, to avoid permanent
damage to the device. The maximum allowable power
dissipation depends on the thermal resistance of the IC
package, the PCB layout, the rate of surrounding airflow,
and the difference between the junction and ambient
temperatures. The maximum power dissipation can be
calculated using the following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and
θJA is the junction-to-ambient
thermal resistance.
For continuous operation, the maximum operating junction
temperature indicated under Recommended Operating
Conditions is 125
°C. The junction-to-ambient thermal
resistance,
θJA, is highly package dependent. For a
WQFN-24L 4x4 package, the thermal resistance,
θJA, is
28
°C/W on a standard JEDEC 51-7 high effective-thermal-
conductivity four-layer test board. The maximum power
dissipation at TA = 25
°C can be calculated as below :
PD(MAX) = (125
°C − 25°C) / (28°C/W) = 3.57W for a
WQFN-24L 4x4 package
The maximum power dissipation depends on the operating
ambient temperature for the fixed TJ(MAX) and the thermal
resistance,
θJA. The derating curves in Figure 14 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.



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