LPC47N267 datasheet(72/180 Pages) SMSC

72 / 180 page

SMSC DS – LPC47N267

Page 72

Rev. 10/23/2000

10.5 IR Transmit Pins

The TXD2 and IRTX2 pins default to output, low on VCC POR and hard reset. These pins are not powered by VTR.

These pins function as described below.

Following a VCC POR, the TXD2 and IRTX2 pins will be output and low. They will remain low until one of the

following conditions are met.

IRTX2 Pin (CR0A bits [7:6]=01):

This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2 power down bit

(CR02, bit 7), at which time the pin will reflect the state of the IR transmit output of the IRCC block (if IR is enabled

through the IR Option Register for Serial Port 2).

TXD2 Pin (CR0A bits [7:6]=00):

This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2 power down bit

(CR02, bit 7), at which time the pin will reflect the state of the transmit output of serial port 2 (if COM is enabled

through CR0C Register for Serial Port 2).

This pin will remain low following a VCC POR until serial port 2 is enabled by setting the UART2 power down bit

(CR02, bit 7), at which time the pin will reflect the state of the IR transmit output of the IRCC block (if IR is

enabled through the CR0C Register for Serial Port 2).

The IRTX2 and TXD2 pins will be driven low whenever serial port 2 is disabled (UART2 power down bit is cleared).

Note that bits[7,6] of CR0A can be used to override this functionality of driving the IRTX2 and TXD2 pins low when

UART2 is powered down. If these bits are set to ‘11’, then the IRTX (TXD2) and IRTX2 pins are high-z.

LPC47N267 Datasheet(PDF) 72 Page - SMSC Corporation