MCP3905A-ESLASHSS datasheet(4/32 Pages) MICROCHIP

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MCP3905A/05L/06A

DS22011B-page 4

Reference Input

Input Range

2.2

—

2.6

Input Impedance

3.2

—

Input Capacitance

—

Analog Inputs

Maximum Signal Level

—

±1

CH0+,CH0-,CH1+,CH1- to AGND

Differential Input Voltage

Range Channel 0

—

±470/G

G = PGA Gain on Channel 0

Differential Input Voltage

Range Channel 1

——

±660

Input Impedance

390

—

Proportional to 1/MCLK frequency

Bandwidth

(Notch Frequency)

—

kHz

Proportional to MCLK frequency,

MCLK/256

Oscillator Input

Frequency Range

MCLK

—

MHz

Power Specifications

Operating Voltage

4.5

—

5.5

AVDD, DVDD

IDD,A

—2.7

3.0

AVDD pin only

IDD,D

—1.2

2.0

DVDD pin only

TEMPERATURE CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, VDD = 4.5V – 5.5V, AGND, DGND = 0V.

Parameters

Sym

Min

Typ

Max

Units

Conditions

Temperature Ranges

Specified Temperature Range

-40

—

+85

°C

Operating Temperature Range

-40

—

+125

°C

(Note)

Storage Temperature Range

-65

—

+150

°C

Note:

The MCP3905A/05L/06A operate over this extended temperature range, but with reduced performance. In

any case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,

Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.

Parameter

Sym

Min

Typ

Max

Units

Comment

Note 1:

Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is

measured with signal (±660 mV) on Channel 1. FOUT0, FOUT1 pulse outputs. Valid from 45 Hz to 65 Hz.

See typical performance curves for higher frequencies and increased dynamic range.

Does not include internal VREF. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between

measured output frequency and expected transfer function.

Percent of HFOUT output frequency variation; Includes external VREF = 2.5V, CH1 = 100 mVRMS @

50 Hz, CH2 = 100 mVRMS @ 50 Hz, AVDD = 5V + 1Vpp @ 100 Hz. DC PSRR: 5V ±500 mV

Error applies down to 60 degree lead (PF = 0.5 capacitive) and 60 degree lag (PF = 0.5 inductive).

Refer to Section 4.0 “Device Overview” for complete description.

Specified by characterization, not production tested.

1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.

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