A8652 datasheet(21/37 Pages) ALLEGRO

21 / 37 page

Wide Input Voltage, Synchronous USB Buck Regulator

with Remote Load Regulation

A8652,

A8653

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Thermal Shutdown (TSD)

The A8652/53 monitors its junction temperature and will stop

PWM switching and pull POK low if it becomes too hot. Also, to

prepare for a restart, the SS and COMP pins will be pulled low

until VSS < VSS(RST). TSD is a non-latched fault so the A8652/53

will automatically recover if the junction temperature decreases

by approximately 20°C.

Pin-to-Ground and Pin-to-Pin Short Protec-

tions

The A8652/53 was designed to satisfy the most demanding

automotive and nonautomotive applications. For example, the

A8652/53 was carefully designed “up front” to withstand a short

circuit to ground at each pin without suffering damage.

In addition, care was taken when defining the A8652/53’s pinouts

to optimize protection against pin-to-pin adjacent short-circuits.

For example, logic pins and high-voltage pins were separated as

much as possible. Inevitably, some low-voltage pins were located

adjacent to high-voltage pins. In these instances, the low-voltage

pins were designed to withstand increased voltages, with clamps

and/or series input resistance, to prevent damage to the A8652/53.

2 × 22 µF

L 10 µH

sen

20 m

R/2

WIRE

62.5 m

R/2

WIRE

62.5 m

LOAD

OUT

LOAD

100 µF

FB2

FB1

5.1 V

ISEN+

ISEN-

Figure 12a: Protection Circuitry for

Load Short-to-Battery

VOUT

POK

Figure 12b: Test Results when Battery = 36 V is

Shorted to VOUT

Ch1: VOUT (10 V/div); Ch2: VFB (2 V/div);

Ch4: VPOK (5 V/div); 50 ms/div

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