MT9072AB datasheet(211/275 Pages) ZARLINK

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MT9072

Data Sheet

211

Zarlink Semiconductor Inc.

17.2.9

Receive CAS (ABCD) Data Registers (Y71 - Y8F) Bit Functions

Table 191 describes the bit functions of each (30 registers in total, one register for each PCM 30 channel) of the

Receive CAS Data Registers in the MT9072. Each register is repeated for each of the 8 framers. Framer 0 is

addressed with Y=0, Framer 1 with Y=1, Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents

the 4 most significant address bits (MSB) A11-A8).

A (0), (1) or (#) in the “Name” column of these tables indicates the state of the data bits after a reset (RESET, RSTC

or RST). The (#) indicates that a (0) or (1) is possible.

17.2.10

Timeslot 0-31 Control Registers (Y90 - YAF) Bit Functions

Table 191 describes the bit functions of each (32 registers in total, one register for each timeslot) of the Timeslot

Control Registers in the MT9072. Each register is repeated for each of the 8 framers. Framer 0 is addressed with

Y=0, Framer 1 with Y=1, Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents the 4 most

significant address bits (MSB) A11-A8). In addition, a simultaneous write to all 8 framers is possible by setting the

MSB address to Y=8 (1000). Note that timeslots 0 to 15 are accommodated by addresses Y90 to Y9F respectively,

and timeslots 16 to 31 are accommodated by addresses YA0 to YAF respectively.

A (0), (1) or (#) in the “Name” column of these tables indicates the state of the data bits after a reset (RESET, RSTC

or RST). The (#) indicates that a (0) or (1) is possible.

Bit

Name

Functional Description

15-4

(#### #### ####)

not used.

3A(n)

(#)

Receive Channel Associated Signaling (CAS) Signaling Bits for Channel 1 to 30.

Bits for n=1 to 15 correspond to channel 1 to 15 and are received on the PCM30

link in timeslot 16 in bit positions one to four in frame n.

Bits for n=17 to 31 correspond to channel 16 to 30 and are received on the PCM30

link in timeslot 16 in bit positions five to eight in frame n -16.

2B(n)

(#)

1C(n)

(#)

0D(n)

(#)

For these functions to be valid, CAS mode must be selected (CSIG=0 register address Y03).

Table 186 - Channel n, Receive CAS Data Register (Address Y71-Y8F)

Bit

Name

Functional Description

15-10 (#### ####) not used.

9RADI(n)

(0)

Receive Alternate Digit Inversion. the data received on DSTo timeslot n from the

received PCM30 link timeslot n has every second bit inverted. If zero, this bit has no effect

on channel data.

8MPDR

(0)

Micro Port Data Receive. Setting this bit freezes the receive data for a given channel

After putting the freeze the data (Y09).

Table 187 - Timeslot (TS) n (n = 0 to 31) Control Register (Address Y90 (TS0) to YAF(TS31)) (E1)

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