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CS8415A-CS Datasheet(PDF) 9 Page - Cirrus Logic |
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CS8415A-CS Datasheet(HTML) 9 Page - Cirrus Logic |
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9 / 42 page  CS8415A 9 SWITCHING CHARACTERISTICS - CONTROL PORT - I2C MODE (Note 15, Inputs: Logic 0 = 0 V, Logic 1 = VL+; CL = 20 pF) Notes: 15. I2C protocol is supported only in 5V mode. 16. Data must be held for sufficient time to bridge the 25 ns transition time of SCL. Parameter Symbol Min Typ Max Units SCL Clock Frequency fscl - - 100 kHz Bus Free Time Between Transmissions tbuf 4.7 - - µs Start Condition Hold Time (prior to first clock pulse) thdst 4.0 - - µs Clock Low Time tlow 4.7 - - µs Clock High Time thigh 4.0 - - µs Setup Time for Repeated Start Condition tsust 4.7 - - µs SDA Hold Time from SCL Falling (Note 16) thdd 0- - µs SDA Setup Time to SCL Rising tsud 250 - - ns Rise Time of Both SDA and SCL Lines tr - - 25 ns Fall Time of Both SDA and SCL Lines tf - - 25 ns Setup Time for Stop Condition tsusp 4.7 - - µs t buf t hdst t hdst t low t r t f t hdd t high t sud t sust t susp Stop Start Start Stop Repeated SDA SCL Figure 4. I2C Mode timing |
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