S34ML01G2 datasheet(13/76 Pages) CYPRESS

Part #	S34ML01G2

Description	1 Gb, 2 Gb, 4 Gb, 3 V, 4-bit ECC, SLC NAND Flash Memory for Embedded

PDF	76 Pages

Scroll/Zoom	100%

Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

Logo

13 / 76 page

S34ML01G2

S34ML02G2

S34ML04G2

Document Number: 002-00499 Rev. *N

Page 13 of 76

Notes:

1. CAx = Column Address bit.

2. PAx = Page Address bit.

3. PLA0 = Plane Address bit zero.

4. BAx = Block Address bit.

5. Block address concatenated with page address and plane address = actual page address, also known as the row address.

6. I/O[15:8] are not used during the addressing sequence and should be driven Low.

For the ×8 address bits, the following rules apply:

 A0 - A11: column address in the page

 A12 - A17: page address in the block

 A18: plane address (for multiplane operations) / block address (for normal operations)

 A19 - A29: block address

For the x16 address bits, the following rules apply:

 A0 - A10: column address in the page

 A11 - A16: page address in the block

 A17: plane address (for multiplane operations) / block address (for normal operations)

 A18 - A28: block address

S34ML01G2 Datasheet(PDF) 13 Page - Cypress Semiconductor