AUIRFS3107 datasheet(2/11 Pages) INFINEON

2 / 11 page

AUIRFS/SL3107

2015-10-20

Notes:





Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that

current limitations arising from heating of the device leads may occur with some lead mounting arrangements.



Repetitive rating; pulse width limited by max. junction temperature.



Limited by TJmax, starting TJ = 25°C, L = 0.045mH, RG = 25, IAS = 140A, VGS =10V. Part not recommended for use above this value.



ISD 140A, di/dt 1380A/µs, VDD V(BR)DSS, TJ  175°C.



Pulse width

400µs; duty cycle  2%.



Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.



Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.



When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to

application note #AN-994



R is measured at TJ approximately 90°C.



RJC value shown is at time zero

Static @ TJ = 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

Conditions

V(BR)DSS

Drain-to-Source Breakdown Voltage

–––

VGS = 0V, ID = 250µA

V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient

–––

0.09

–––

V/°C Reference to 25°C, ID = 5mA 

RDS(on)

Static Drain-to-Source On-Resistance

–––

2.5

3.0

 VGS = 10V, ID = 140A 

VGS(th)

Gate Threshold Voltage

2.0

–––

4.0

VDS = VGS, ID = 250µA

gfs

Forward Trans conductance

230

–––

VDS = 50V, ID = 140A

Gate Resistance

–––

1.2

–––



IDSS

Drain-to-Source Leakage Current

–––

µA

VDS = 75V, VGS = 0V

–––

250

VDS = 75V,VGS = 0V,TJ =125°C

IGSS

Gate-to-Source Forward Leakage

–––

100

VGS = 20V

Gate-to-Source Reverse Leakage

–––

-100

VGS = -20V

Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Total Gate Charge

–––

160

240

ID = 140A

Qgs

Gate-to-Source Charge

–––

VDS = 38V

Qgd

Gate-to-Drain Charge

–––

VGS = 10V

Qsync

Total Gate Charge Sync. (Qg - Qgd)

–––

106

–––

td(on)

Turn-On Delay Time

–––

VDD = 49V

Rise Time

–––

110

–––

ID = 140A

td(off)

Turn-Off Delay Time

–––

RG= 2.7

Fall Time

–––

100

–––

VGS = 10V

Ciss

Input Capacitance

–––

9370 –––

VGS = 0V

Coss

Output Capacitance

–––

840

–––

VDS = 50V

Crss

Reverse Transfer Capacitance

–––

580

–––

ƒ = 1.0MHz, See Fig. 5

Coss eff.(ER)

Effective Output Capacitance (Energy Related)

–––

1130 –––

VGS = 0V, VDS = 0V to 60V

Coss eff.(TR)

Effective Output Capacitance (Time Related)

–––

1500 –––

VGS = 0V, VDS = 0V to 60V

Diode Characteristics

Parameter

Min. Typ. Max. Units

Conditions

Continuous Source Current

–––

––– 230

MOSFET symbol

(Body Diode)

showing the

ISM

Pulsed Source Current

–––

900

integral reverse

(Body Diode)

p-n junction diode.

VSD

Diode Forward Voltage

–––

1.3

TJ = 25°C,IS = 140A,VGS = 0V 

trr

Reverse Recovery Time

–––

TJ = 25°C

VDD = 64V

–––

TJ = 125°C

IF = 140A,

Qrr

Reverse Recovery Charge

–––

103

–––

TJ = 25°C

di/dt = 100A/µs 

–––

132

–––

TJ = 125°C

IRRM

Reverse Recovery Current

–––

3.6

–––

TJ = 25°C



ton

Forward Turn-On Time

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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