RTL8308B

2002/01/23

Rev. 2.0

13

The Management frame format is listed below:

Management frame fields

PRE

ST

OP

PHYAD

REGAD

TA

DATA

IDLE

READ

1…1

01

10

AAAAA

RRRRR

Z0

DDDDDDDDDDDDDDDD

Z

WRITE 1…1

01

01

AAAAA

RRRRR

10

DDDDDDDDDDDDDDDD

Z

6.5 Reversible PHYAD Order

In order to maintain maximum flexibility, the RTL8308B provides a reversible PHYAD order feature. This allows

reverse ordering of the PHY addresses, which allows connection of the RTL8308B to diverse external PHY

devices. The addresses of ports [A] to [H] correspond to PHYAD 01000b to 01111b, or to PHYAD 01111b to

01000b, depending on the value of PHYAD_RV in the EEPROM.

6.6 Address Search and Learning

The address look-up table consists of an 8K entry hash table and a 128 entry CAM. The RTL8308B uses the hashing

algorithm or direct mapping method to search destination MAC addresses from and record source MAC address to

the table. If a hashed or mapped location is not empty, the RTL8308B will compare the destination MAC address with

the contents of the CAM for address searching and store source MAC address to CAM for learning.

The aging time of the MAC address is 300 seconds. The address hashing or direct mapping algorithm can be

selected via the 24LC02. A port’s MAC address register is cleared on power-up, or hardware reset. If the SA aging

option is enabled, the dynamically learned SA will be cleared if it is not refreshed in less than programmed time.

The table lookup engine provides the switching information required for routing the data packets. The address look

up table is set up through auto address learning (dynamic) or manual entry (static). The static addresses are

assigned to the address table by the EEPROM or management device. All static address entries will not be aged or

updated by the RTL8308B.

After a frame is received by RTL8308B, the embedded source address (SA) and destination addresses (DA) are

retrieved. The source address retrieved from the received frame is automatically stored in a SA buffer. The

RTL8308B will then check for error and security violation, and perform a SA search. If there is no error or security

violation, the chip will store the source address in the address lookup table. If the SA has been previously stored in

another port’s SA table, the RTL8308B will delete the SA from the previously stored location.

The Individual MAC Address is a 48-bit unique MAC address to be programmed or learned. Bit 0 of a SA will be

masked, i.e. no multicast SA.

The RTL8308B provides an on-chip MACAddress-To-PortID/TrunkID table with up to 1K entries for packet

destination look-up operation.