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STM32L052R6 Datasheet(PDF) 95 Page - STMicroelectronics |
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STM32L052R6 Datasheet(HTML) 95 Page - STMicroelectronics |
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95 / 136 page ![]() DocID025936 Rev 6 95/136 STM32L052x6 STM32L052x8 110 Figure 29. Typical connection diagram using the ADC 1. Refer to Table 63: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 30 or Figure 31, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 30. Power supply and reference decoupling (VREF+ not connected to VDDA) |
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