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TLE7186F Datasheet(PDF) 22 Page - Infineon Technologies AG |
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TLE7186F Datasheet(HTML) 22 Page - Infineon Technologies AG |
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22 / 39 page ![]() Data Sheet 22 Rev. 1.2, 2016-01-28 TLE7186F Interface, VDH Switch and INH Digital Output 8.2 VDHS Switch The System IC has an integrated switch connecting the VDH pin to the VDHS pin. This allows to place an external voltage divider for VDH voltage monitoring at the VDHS pin and to disconnect this voltage divider from VDH during sleep mode to assure low current consumption. The VDHS switch is only deactivated when the VDD regulator is switched off. 8.3 Digital Output INHD The System IC provides a digital output INHD showing the logic state of INH (e.g. KL15) after a complete wake- up of the driver (approx. 1ms). The input levels of INH for the INHD output are defined separately from the levels for wake-up. Voltage levels for INH wake-up function please see Chapter 9.4 section Wake-up and go-to-sleep. The output stage consists of an integrated low side switch with a pull-up resistor to VDD. 8.4 Electrical Characteristics Electrical Characteristics - Protection and diagnostic functions V S = 6.0 to 20V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. Interface - static parameters 8.4.1 IFMA input voltage high level (for IFµC high) V IMHL 59 ––% of V VS; IC not in Sleep Mode 8.4.2 IFMA input voltage low level (for IFµC low) V IMLL –– 46 % of V VS; IC not in Sleep Mode; 8.4.3 IFMA input hysteresis (for IFµC) V IMhy 0.5 –9% of V VS; IC not in Sleep Mode 8.4.4 IFMA wake up voltage high level = V S-VIFMA V IMWH 2 – 4 V valid in Sleep Mode 8.4.5 IFMA low time to guarantee wake- up t IFlow 100 ––µs V VS=7...20V 8.4.6 IFMA internal pull-up resistor to V S R IMu 210 340 495 k Ω – 8.4.7 IFMA internal pull-down resistor to GND R IMd 420 700 980 k Ω not active in Sleep Mode 8.4.8 IFMA input current related to VS V IFMA = 59% of VVS V IFMA = 46% of VVS I IFMA/VVS -2.0 -3.0 – – +2.0 +1.0 µA/V – 8.4.9 IFµC output low voltage V IuLL – – 0.5 V no external load 8.4.10 IFµC internal pull-up resistor to V DD RIu 8.5 – 23 k Ω – Interface - dynamic parameters 8.4.11 IFµC duty cycle d Iu 0– 100 % – 8.4.12 Propagation time rising edge IFµC t PRE – – 6 µs Including rise time to 80% of V VDD; C load=100pF 8.4.13 Propagation time falling edge IFµC t PFE – – 5 µs Including fall time to 20% of V VDD; Cload=100pF |
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