SST38VF6402 datasheet(15/64 Pages) MICROCHIP

15 / 64 page

DS-20005015B

08/15

64 Mbit (x16) Advanced Multi-Purpose Flash Plus

SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404

Not Recommended for New Designs

Hardware Block Protection

The SST38VF6402 and SST39VF6404 devices support top hardware block protection, which protects

the top boot block of the device. For SST38VF6402, the boot block consists of the top 32 KWord block,

and for SST39VF6404 the boot block consists of the top two 4 KWord sectors (8 KWord total).

The SST38VF6401 and SST38VF6403 devices support bottom hardware block protection, which pro-

tects the bottom boot block of the device. For SST38VF6401, the boot block consists of the bottom 32

KWord block, and for SST39VF6403 the Boot Block consists of the bottom two 4 KWord sectors (8

KWord total). The boot block addresses are described in Table 5.

Program and Erase operations are prevented on the Boot Block when WP# is low. If WP# is left float-

ing, it is internally held high via a pull-up resistor. When WP# is high, the Boot Block is unprotected,

which allows Program and Erase operations on that area.

Hardware Reset (RST#)

The RST# pin provides a hardware method of resetting the device to read array data. When the RST#

pin is held low for at least TRP, any in-progress operation will terminate and return to Read mode. When

no internal Program/Erase operation is in progress, a minimum period of TRHR is required after RST#

is driven high before a valid Read can take place. See Figure 20 for more information.

The interrupted Erase or Program operation must be re-initiated after the device resumes normal oper-

ation mode to ensure data integrity.

Software Data Protection (SDP)

The SST38VF6401/6402/6403/6404 devices implement the JEDEC approved Software Data Protection

(SDP) scheme for all data alteration operations, such as Program and Erase. These devices are

shipped with the Software Data Protection permanently enabled. See Table 11 for the specific software

command codes.

All Program operations require the inclusion of the three-byte sequence. The three-byte load sequence

is used to initiate the Program operation, providing optimal protection from inadvertent Write opera-

tions. SDP for Erase operations is similar to Program, but a six-byte load sequence is required for

Erase operations.

During SDP command sequence, invalid commands will abort the device to read mode within TRC. The

contents of DQ15-DQ8 can be VIL or VIH, but no other value, during any SDP command sequence.

Table 5: Boot Block Address Ranges

Product

Size

Address Range

Bottom Boot Uniform

SST38VF6401

32 KW

000000H-007FFFH

Top Boot Uniform

SST38VF6402

32 KW

3F8000H-3FFFFFH

Bottom Boot Non-Uniform

SST38VF6403

8 KW

000000H-001FFFH

Top Boot Non-Uniform

SST38VF6404

8 KW

3FE000H-3FFFFFH

T5.0 20005015

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