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LM363 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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LM363 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
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9 / 22 page ![]() Application Hints The LM363 was designed to be as simple to use as possi- ble but several general precautions must be taken The dif- ferential inputs are directly coupled and need a return path to power supply common Worst-case bias currents are only 10 nA for the LM363 so the return impedance can be as high as 100 MX Ground drops between signal return and IC supply common should not be ignored While the LM363 has excellent common-mode rejection signals must remain within the proper common-mode range for this specification to apply Operating common-mode range is guaranteed from b10V to a10V with g15V supplies The high-gain (500 or 1000) versions have large gain-band- width products (15 MHz or 30 MHz) so board layout is fairly critical The differential input leads should be kept away from output force and sense leads especially at high imped- ances Only 1 pF from output to positive input at 100 kX source impedance can cause oscillations The gain adjust leads on the 16-pin package should be treated as inputs and kept away from the output wiring POWER SUPPLY The LM363 may be powered from split supplies from g5V to g18V (or single-ended supplies from 10V to 36V) Posi- tive supply current is typically 12 mA independent of supply voltage The negative supply current is higher than the posi- tive by the current drawn through the voltage dividers for the reference and sense inputs (typ 600 mA total) The LM363’s excellent PSRR often makes regulated supplies unneces- sary Actually supply voltage can be as low as 7V total but PSRR is severely degraded so that well-regulated supplies are recommended below 10V total Split supplies need not be balanced output swing and input common-mode range will simply not be symmetrical with unbalanced supplies For example at a12V and b5V supplies input common-mode range is typically a105V to b2V and output swing is a11V to b4V When using ultra-low offset versions best results are ob- tained at g15V supplies For example the LM363-500’s off- set voltage is guaranteed within 150 mVat g15V at 25 C Running at g5V results in a worst-case negative PSRR er- ror of 10V (b15V to b5V) multiplied by 32X10b6 (110 dB) or 32 mV increasing the worst-case offset Positive PSRR results in another 10 mV worst-case change INPUTS The LM363 input circuitry is depicted in the Simplified Sche- matic The input stage is run relatively rich (50 mA) for low voltage noise and wide bandwidth super-beta transistors and bias-current cancellation (not shown) keep bias cur- rents low Due to the bias-current cancellation circuitry bias current may be either polarity at either input While input current noise is high relative to bias current it is not signifi- cant until source resistance approaches 100 kX Input common-mode range is typically from 3V above Vb to 15V below Va so that a large potential drop between the input signal and output reference can be accommodated However a return path for the input bias current must be provided the differential input stage is not isolated from the supplies Differential input swing in the linear region is equal to output swing divided by gain and typically ranges from 13V at Ge10 to 13 mV at Ge1000 Clamp diodes are provided to prevent zener breakdown and resulting degradation of the input transistors At large input overdrives these diodes conduct greatly increasing input currents This behavior is illustrated in the IIN vs VIN plot in the Typical Performance Characteristics (The graph is not symmetrical because at large input currents a portion of the current into the device flows out the Vb terminal) The input protection resistors allow a full 10V differential input voltage without degradation even at Ge1000 At input voltages more than one diode drop below Vb or two diode drops above Va input current increases rapidly Diode clamps to the supplies or external resistors to limit current to 20 mA will prevent damage to the device REFERENCE AND SENSE INPUTS The equivalent circuit is shown in the schematic diagram Limitations for correct operation are as follows Maximum differential swing between reference and sense pins is typi- cally g15V (g10V guaranteed) If this limit is exceeded the sense pin no longer controls the output which then pegs high or low The negative common-mode limit is 15V below Vb (This is permissible because R2 and R4 are returned to a node biased higher than Vb ) If large positive voltages are applied to the reference and sense pins the common-mode range of the signal inputs begins to suffer as the drop across R13 and R16 increases For example at g15V sup- plies VREFeVSENSEe0V signal input range is typically b 12V to a 135V At VREFeVSENSEe15V signal input range drops to b11V toa135V The reference and sense pins can be as much as 10V above Va as long as a restrict- ed signal common-mode range (b10V min) can be tolerat- ed For maximum bipolar output swing at g15V supplies the reference pin should be returned to a voltage close to ground At lower supply voltages the reference pin need not be halfway between the supplies for maximum output swing For example at Va ea 12V and Vb eb5V grounding the reference pin still allows a a11V to b4V swing For single-supply systems the reference pin can be tied to either supply if a single output polarity is all that is required For a bipolar input and output create a low imped- ance reference with an op amp and voltage divider or a regulator (eg LM336 LM385 LM317L) This forms the ref- erence for all succeeding signal-processing stages (Don’t connect the reference terminal directly to a voltage divider this degrades gain error) See Figure 1 a Usual configuration maximizes bipolar output swing TLH5609 – 8 b Unequal supplies output ground referred Full output swing pre- served referred to supplies FIGURE 1 Reference Connections 9 |
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