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MCP37211-200 Datasheet(PDF) 21 Page - Microchip Technology |
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MCP37211-200 Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 142 page  2014-2016 Microchip Technology Inc. DS20005355C-page 21 MCP37211-200 AND MCP37D11-200 FIGURE 2-1: Timing Diagram - CMOS Output. FIGURE 2-2: Timing Diagram - LVDS Output with Even Bit First Option. CLK- CLK+ Input Clock: DCLK Digital Clock Output: Q<N:0> Output Data: OVR Over-Range Output: S-L-1 S-L S-L+1 S-1 S S-L-1 S-L S-L+1 S-1 S S-1 S S+1 S+L S+L-1 tA Latency = L Cycles tCPD tDC tPD Input Signal: *S = Sample Point CLK- CLK+ Input Clock: Digital Clock Output: Output Data: Word-CLK/ Over-Range Output: S-1 S S+1 S+L S+L-1 tA Latency = L Cycles tCPD tDC tPD DCLK- DCLK+ Q-[N:0] Q+[N:0] WCK/OVR- WCK/OVR+ EVEN S-L ODD S-L EVEN S-L-1 ODD S-L-1 EVEN S-L+1 EVEN S EVEN S-1 ODD S-1 WCK S-L OVR S-L WCK S-L-1 OVR S-L-1 WCK S-L+1 WCK S WCK S-1 OVR S-1 Input Signal: *S = Sample Point |
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