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HD3SS460RNHT Datasheet(PDF) 20 Page - Texas Instruments |
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HD3SS460RNHT Datasheet(HTML) 20 Page - Texas Instruments |
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20 / 37 page  ML1N ML1P ML3P ML3N ML2N ML2P ML0P ML0N A10 VBUS GND A11 A12 SSRXP1 SSRXP2 SSRXN1 SSRXN1 B9 B8 B7 B6 B5 B4 B3 B2 B1 AUXP DN2 SBU2 GND VBUS B12 B11 B10 CC1 GND AUXP DP1 DN1 AUXN SBU1 VBUS SSTXP1 SSTXP2 SSTXN1 SSTXN2 SSRXP2 SSRXP1 SSRXN2 SSRXN1 AUXN DP2 SSTXP2 SSTXP1 SSTXN2 SSTXN1 GND VBUS CC2 TypeC Connector and Source Pin Mapping ML0N ML0P ML2P ML2N ML3N ML3P ML1P ML1N A1 A2 A3 A4 A5 A6 A7 A8 A9 Note: It is recommended to add isolation circuit if voltage is to be present on any of the I/Os while the HD3SS460 device is off. pull-down resistor between 1M -2M is recommended on SBU1 and SBU2. CC1 CC2 CRX1P CRX1N CTX1P CTX1N CRX2N CRX2P CTX2N CTX2P CSBU1 CSBU2 USB2_N0 USB2_P0 CSBU1 CSBU2 VBUS R156 2M C8 10uF J2 USB_TypeC_Receptacle_ GND0 A1 SSTXP1 A2 SSTXN1 A3 VBUS1 A4 CC1 A5 DP1 A6 DN1 A7 SBU1 A8 VBUS2 A9 SSRXN2 A10 SSRXP2 A11 GND1 A12 GND2 B1 SSTXP2 B2 SSTXN2 B3 VBUS3 B4 CC2 B5 DP2 B6 DN2 B7 SBU2 B8 VBUS4 B9 SSRXN1 B10 SSRXP1 B11 GND3 B12 Shield1 g1 Shield2 g2 Shield3 g3 Shield4 g4 Shield5 g5 Shield6 g6 R158 2M Copyright © 2016, Texas Instruments Incorporated 20 HD3SS460 SLLSEM7D – JANUARY 2015 – REVISED JANUARY 2017 www.ti.com Product Folder Links: HD3SS460 Submit Documentation Feedback Copyright © 2015–2017, Texas Instruments Incorporated Schematic diagrams Figure 14, Figure 15, and Figure 16 show the DP Source/USB Host implementation; and, Figure 17, Figure 18, and Figure 19 show the DP Sink/USB Device/HUSB Hub/Dock implementation, respectively. Figure 14. Schematic Implementations for DP Source/ USB Host (1 of 3) |
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