U490B datasheet(2/6 Pages) TEMIC

2 / 6 page

U490B

TELEFUNKEN Semiconductors

Rev. A1, 29-May-96

2 (6)

Pin Description

Trigger

Sync.

GND

Ramp

Output

Contr

Symbol

Function

Not connected

Trigger

Triggering

Sync.

Synchronization

GND

Ground

Contr

Control input

Ramp

Output

Supply voltage

Supply, Pin 8

Internal voltage limiter enables a simple supply from the

mains via series resistor R1.The supply voltage between

Pin 8 (VS) and ground (Pin 4) builts up via R1 and is

smoothed by the capacitor C1.

Series resistor R1 can be calculated as follows:

1max

[ 0.85 x

mains –VSmax

2xItot

where

Vmains

+ Mains supply voltage

VSmax

+ Maximum supply voltage

Itot

+ ISmax )IX

ISmax

+ Maximum current consumption of the IC

+ Current consumption of the

external components

Phase Control, Pins 3, 5 and 6

The circuit is synchronized with mains supply through

Pin 3. As long as the switch S1 is open, the circuit is in

wait state i.e., the capacitor C6 (150 nF) is discharged and

is kept in this state (High level). When the switch S1 is

closed, there is a current flow in Pin 2 which is evaluated

by the circuit. If this current flows after the elapse of delay

time, then the phase control is released. Capacitor, C6, is

then charged with I6

+ 100 mA towards ground. At the

same time, there is a current flow of

[ 100 mA into Pin 5,

which results in voltage drop across resistor R5. Control

voltage, V5, is then 1.5 V lower internally.

The output stage is released when the ramp voltage V6 is

equal to (V5

* 1.5 V). When the voltage difference is

[ 150 mV, it is again turned–off.

The result is an output pulse, whose phase shift to the zero

crossing of mains voltage is determined by the resistor R5

at control input Pin 5 (see fig. 2). Capacitor C6 is charged

to a value of

[ 1.5 V. It remains there till the switch S1

again opens and the repetition delay time is over.

The circuit is released, when four periods of the line volt-

age have expired after build up of the operating voltage,

before the switch S1 is closed.

closed

open

(Sync.)

(Trigger)

(Ramp)

(Output)

50 ms

100 ms

150 ms

200 ms

150 mV

”X”

95 10867

V5 – 1.5 V

Figure 2. Signal characteristics

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