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T89C5121-ICSIL Datasheet(PDF) 39 Page - ATMEL Corporation |
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T89C5121-ICSIL Datasheet(HTML) 39 Page - ATMEL Corporation |
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39 / 110 page  39 T8xC5121 4164E–SCR–02/04 Table 18. SCIIR Register SCIIR (S:AEh, SCRS = 0) Smart Card UART Interrupt Identification Register (read only) Reset Value = 0X00 0000b 7 6 543 2 1 0 SCTBI - CIccERR CVccERR SCWTI SCTI SCRI SCPI Bit Number Bit Mnemonic Description 7SCTBI SCIB transmit buffer interrupt This bit is set by hardware when the Transmit Buffer is copied to the transmit shift register of the Smart Card UART. It is cleared by hardware when this register is read. 6- Reserved The value read from this bit is indeterminate. Do not change this bit or write 0. 5CIccERR Card current status This bit is set when the output current goes out of the current range. It is cleared by hardware when this register is read. 4 CVccERR Card voltage status This bit is set when the output voltage goes out of the voltage range specified by CVcc field. It is cleared by hardware when this register is read. 3SCWTI Smart card wait Timeout interrupt This bit is set by hardware when the Smart Card Timer 0 times out. It is cleared by hardware when this register is read. 2SCTI Smart card transmit interrupt This bit is set by hardware when the Smart Card UART completes a character transmission. It is cleared by hardware when this register is read. 1SCRI Smart card receive interrupt This bit is set by hardware when the Smart Card UART completes a character reception. It is cleared by hardware when this register is read. 0SCPI Smart card parity error interrupt This bit is set at the same time as SCTI or SCRI if a parity error is detected. It is cleared by hardware when this register is read. |
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