 2013-2014 Microchip Technology Inc.

Preliminary

DS40001720C-page 13

PIC12(L)F1612/16(L)F161X

bit 2

1

= ON

- The PPSLOCK bit is permanently set after the first access sequence that sets it.

0

= OFF

- The PPSLOCK bit can be set and cleared as needed by the PPSLOCK access sequence.

bit 1-0

WRT<1:0>: Flash Memory Self-Write Protection bits

2 kW Flash memory (PIC12(L)F1612/16(L)F1613):

11

= OFF

- Write protection off

10

= BOOT

- 000h to 1FFh write-protected, 200h to 7FFh may be modified by PMCON control

01

= HALF

- 000h to 3FFh write-protected, 400h to 7FFh may be modified by PMCON control

00

= ALL

- 000h to 7FFh write-protected, no addresses may be modified by PMCON control

4 kW Flash memory (PIC16(L)F1614/8):

11

= OFF

- Write protection off

10

= BOOT

- 000h to 1FFh write-protected, 200h to FFFh may be modified by PMCON control

01

= HALF

- 000h to 7FFh write-protected, 800h to FFFh may be modified by PMCON control

00

= ALL

- 000h to FFFh write-protected, no addresses may be modified by PMCON control

8 kW Flash memory (PIC16(L)F1615/9):

11

= OFF

- Write protection off

10

= BOOT

- 0000h to 01FFh write-protected, 0200h to 1FFF may be modified by PMCON control

01

= HALF

- 0000h to 0FFFh write-protected, 1000h to 1FFF may be modified by PMCON control

00

= ALL

- 0000h to 1FFFh write-protected, no addresses may be modified by PMCON control

REGISTER 3-5:

CONFIGURATION WORD 3

R/P-1

R/P-1

R/P-1

R/P-1

R/P-1

R/P-1

WDTCCS2

WDTCCS1

WDTCCS0

WDTCWS2

WDTCWS1

WDTCWS0

bit 13

bit 8

U-1

R/P-1

R/P-1

R/P-1

R/P-1

R/P-1

R/P-1

R/P-1

—

WDTE1

WDTE1

WDTCPS4

WDTCPS3

WDTCPS2

WDTCPS1

WDTCPS0

bit 7

bit 0

Legend:

W = Writable bit

‘0’ = Bit is cleared

R = Readable bit

‘1’ = Bit is set

x = Bit is unknown

-n = Value at POR

U = Unimplemented bit

P = Programmable Bit

bit 13-11

WDTCCS<2:0>: WDT Input Clock Selector bit:

000

=

WDT reference clock is the 31.0 kHz LFINTOSC (default value)

001

=

WDT reference clock is the 31.25 kHz MFINTOSC output

010

=

Reserved

...

110

=

Reserved

111

=

SWC

- Software Control, controlled by WDTCS bits

bit 10-8

WDTCWS<2:0>: WDT Window Select bits:

000

=

WDTCWS125

- 12.5% window open time (87.5% delay time)

001

=

WDTCWS25

- 25% window open time (75% delay time)

010

=

WDTCWS375

- 37.5% window open time (62.5% delay time)

011

=

WDTCWS50

- 50% window open time (50% delay time)

100

=

WDTCWS625

- 62.5% window open time (37.5% delay time)

101

=

WDTCWS75

- 75% window open time (25% delay time)

110

=

WDTCWS100

- 100% window open time (Legacy WDT)

111

=

WDTCWSSW

- Software WDT window size control (controlled by WDTWS)

bit 7

Unimplemented: Read as ‘1’

Note

1:

Typical time-out based on 31 kHz clock.

2:

Software-controlled (WDTPS).

REGISTER 3-4:

CONFIGURATION WORD 2 (CONTINUED)

Note

1:

The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.

2:

3:

This bit is only implemented on the PIC16(L)F1614/5/8/9. It acts as Unimplemented: Read as '1' on all other parts in

the family.