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ZAMC4100GA2R Datasheet(PDF) 27 Page - Integrated Device Technology |
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ZAMC4100GA2R Datasheet(HTML) 27 Page - Integrated Device Technology |
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27 / 155 page  ZAMC4100 Datasheet © 2016 Integrated Device Technology, Inc. 27 January 26, 2016 2 System Blocks Description 2.1. Power Supply As illustrated in Figure 2.1, the internal supply voltages of the system are generated by four linear regulators and one buffer: • REG5V0 Primary analog supply voltage: 5.0V typical. REG5V0 is not switched-off in SLEEP Mode. • REG2V5 Secondary analog supply voltage: 2.5V typical. REG2V5 is switched-off in SLEEP Mode. • REG3V3 MCU periphery (GPIO, FLASH) digital supply voltage: 3.3V typical. REG3V3 is switched off in SLEEP Mode. • REG1V8 SBC digital supply voltage: 1.8V typical. This voltage is used as a reference for the MCU core supply. REG1V8 is not switched off in SLEEP Mode. • BUF1V8 Power supply for the MCU core referenced to the SBC digital supply voltage. BUF1V8 is switched off in SLEEP Mode. Figure 2.1 ZAMC4100 Supply Structure REG3V3 REG2V5 REG1V8 REG5V0 VDDE VSS VSSA VSSD VSSD CAP_5V0 CAP_3V3 CAP_1V8 BUF1V8 CAP_MCU VSSD |
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