PCA9536DP datasheet(10/16 Pages) PHILIPS

10 / 16 page

Philips Semiconductors

Objective data sheet

PCA9536

4-bit I2C and SMBus I/O port

2004 Aug 20

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take

precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”

Handling MOS devices”.

DC CHARACTERISTICS

VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Supplies

VDD

Supply voltage

2.3

—

5.5

IDD

Supply current

Operating mode; VDD = 5.5 V; no load;

fSCL = 100 kHz

—

104

175

µA

Istbl

Standby current

Standby mode; VDD = 5.5 V; no load;

VI = VSS; fSCL = 0 kHz; I/O = inputs

—

225

350

µA

Istbh

Standby current

Standby mode; VDD = 5.5 V; no load;

VI = VDD; fSCL = 0 kHz; I/O = inputs

—

0.25

µA

VPOR

Power-on reset voltage (Note 1)

No load; VI = VDD or VSS

—

1.5

1.65

input SCL; input/output SDA

VIL

LOW-level input voltage

–0.5

—

0.3 VDD

VIH

HIGH-level input voltage

0.7 VDD

—

5.5

IOL

LOW-level output current

VOL = 0.4 V

tbd

—

Leakage current

VI = VDD = VSS

–1

—

µA

Input capacitance

VI = VSS

—

I/Os

VIL

LOW-level input voltage

–0.5

—

0.8

VIH

HIGH-level input voltage

2.0

—

5.5

VOL = 0.5 V; VDD = 2.3 V; Note 2

—

VOL = 0.7 V; VDD = 2.3 V; Note 2

—

LOW level output current

VOL = 0.5 V; VDD = 4.5 V; Note 2

—

IOL

LOW-level output current

VOL = 0.7 V; VDD = 4.5 V; Note 2

—

VOL = 0.5 V; VDD = 3.0 V; Note 2

—

VOL = 0.7 V; VDD = 3.0 V; Note 2

—

IOH = –8 mA; VDD = 2.3 V; Note 3

1.8

—

IOH = –10 mA; VDD = 2.3 V; Note 3

1.7

—

HIGH level output voltage

IOH = –8 mA; VDD = 3.0 V; Note 3

2.6

—

VOH

HIGH-level output voltage

IOH = –10 mA; VDD = 3.0 V; Note 3

2.5

—

IOH = –8 mA; VDD = 4.75 V; Note 3

4.1

—

IOH = –10 mA; VDD = 4.75 V; Note 3

4.0

—

IIH

Input leakage current

VDD = 3.6 V; VI = VDD

—

µA

IIL

Input leakage current

VDD = 5.5 V; VI = VSS

—

–100

µA

Input capacitance

—

3.7

Output capacitance

—

3.7

NOTES:

1. VDD must be lowered to 0.2 V in order to reset part.

2. The total current sunk by all I/Os must be limited to 100 mA.

3. The total current sourced by all I/Os must be limited to 85 mA.

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