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Table 10. SPI - ELECTRICAL CHARACTERISTICS

referred to GND and currents are assumed positive, when the current flows into the pin).

Note: 1. Value of input capacity is not measured in production test. Parameter guaranteed by design.

2. DI timing parameters tested in production by a passed/failed test:

Tj=-40°C/+25°C:

SPI communication @2MHZ

Tj=+125°C:

SPI communication @1.25MHZ

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

Delay time from standby to active mode

delay time

Switching from standby to

active mode. Time until

output drivers are enabled

after CSN going to high.

160

300

µs

Inputs: CSN, CLK, PWM1/2 and DI

input low level

1.5

2.0

V

input high level

3.0

3.5

V

input hysteresis

0.5

V

pull up current at input CSN

-40

-20

-8

µA

pull down current at input CLK

10

25

50

µA

pull down current at input DI

10

25

50

µA

pull down current at input PWM1

10

25

50

µA

1

input capacitance at input CSN,

CLK, DI and PWM1/2

10

15

pF

clock period

1000

ns

clock high time

400

ns

clock low time

400

ns

CSN setup time, CSN low before

rising edge of CLK

400

ns

CLK setup time, CLK high before

rising edge of CSN

400

ns

DI setup time

200

ns

DI hold time

200

ns

rise time of input signal DI, CLK,

CSN

100

ns

fall time of input signal DI, CLK,

CSN

100

ns