PROGRAMMABLE DIVIDER (N COUNTER)

The N counter consists of the 11-bit programmable counter If the Control Bit (last bit shifted into the Data Register) is LOW

data is transferred from the 19-bit shift register into an 11-bit latch which sets the 11-bit programmable Counter Serial data

format is shown below

TLW12458 – 15

Note

R8 to R18 Programmable counter divide ratio control bits (3 to 2047)

7 LSB BITS OF N REGISTER

Divide

N

N

N

N

N

N

N

Ratio

7

6

5

4

3

2

1

X

X

XXXXXX

Note

11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO

Divide

18

N

17

N

16

N

15

N

14

N

13

N

12

N

11

N

10

NN

9

N

8

Ratio

N

3

000000000

1

1

4

000000001

0

0

#

#########

#

#

2047

1

1

1

1

1

1

1

1

1

1

1

Note

Divide ratio 3 to 2047 (Divide ratios less than 3 are prohibited)

EQUATION FOR OUTPUT FREQUENCY

DETERMINATION

lator (VCO)

N

Preset divide ratio of binary 11-bit programmable

counter (3 to 2047)

oscillator

R

Preset divide ratio of binary 14-bit programmable ref-

erence counter (3 to 16383)

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