ESDA6V1P6

4/8

TECHNICAL INFORMATION

IC

to be

protected

I/O2

I/O1

I/O4

I/O3

Fig. A1: Application example.

With the focus of lowering the operation levels, the

problem of malfunction caused by the environment

is critical. Electrostatic discharge (ESD) is a major

cause of failure in electronic systems.

As a transient voltage suppressor, ESDA6V1P6 is

an ideal choice for ESD protection by suppressing

ESD events. It

is capable of clamping the

incoming transient to a low enough level such that

any damage is prevented on the device protected

by ESDA6V1P6.

ESDA6V1P6 serves as a parallel protection

elements, connected between the signal line and

ground. As the transient rises above the operating

voltage of the device, the ESDA6V1P6 becomes a

low impedance path diverting the transient current

to ground.

1. ESD protection by ESDA6V1P6

The clamping voltage is given by the following formula:

As shown in figure A2, the ESD strikes are clamped by the transient voltage suppressor.

V(i/o)

Device

to be

protected

ESD surge

ESD6V1P6

Fig. A2: ESD clamping behavior.

To have a good approximation of the remaining voltages at both Vi/o side, we provide the typical dynamical

we have:

()

Vi o

V

R

V

R

BR

d

g

g

/

=+

×

Ω (typ.) give:

()

V i o

Volts

/.

= 42 8

This confirms the very low remaining voltage across the device to be protected. It is also important to note

that in this approximation the parasitic inductance effect was not taken into account. This could be a few

tenths of volts during a few ns at the Vi/o side.