LPS225HB datasheet(35/47 Pages) STMICROELECTRONICS

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LPS225HB

8.6

CTRL_REG2 (11h)

Address:

11h (R/W)

Reset:

10h

Description:

Control register.

[7] BOOT: Reboot memory content. Default value: 0

(0: normal mode; 1: reboot memory content) Self-clearing upon completion.

[6] FIFO_EN: FIFO Enable. Default value: 0

(0: disable; 1: enable)

[5] STOP_ON_FTH: Stop on FIFO threshold. Enable FIFO watermark level use. Default

value: 0

(0: disable; 1: enable)

[4] IF_ADD_INC: Register address automatically incremented during a multiple byte

access with a serial interface (I2C or SPI). Default value: 1

(0: disable; 1 enable)

[3] I2C_DIS: disable I2C interface. Default value: 0

(0: SPI enable;1: I2C disable)

[2] SWRESET: Software reset. Default value: 0

(0: normal mode; 1: software reset) Self-clearing upon completion

[1] Reserved: this bit must be set to ‘0’ for the correct operation of the device

[0] ONE_SHOT: One shot enable. Default value: 0

(0: waiting for start of conversion; 1: start of a new dataset)

Description:

The BOOT bit is used to refresh the content of the internal registers stored in the

Flash memory block. At device power-up the content of the Flash memory block is

transferred to the internal registers related to the trimming functions to permit good

behavior of the device itself. If for any reason the content of the trimming registers is

modified, it is sufficient to use this bit to restore the correct values. When the BOOT bit

is set to ‘1’, the content of the internal Flash is copied inside the corresponding internal

registers and is used to calibrate the device. These values are factory trimmed and

they are different for every device. They permit good behavior of the device and

normally they should not be changed. At the end of the boot process the BOOT bit is

set again to ‘0’ by hardware. The BOOT bit takes effect after one ODR clock cycle.

The SWRESET bit resets the following registers to the default value and returns to

‘0’ by hardware. During a software reset FIFO content is flushed.

BOOT

FIFO_EN

STOP_ON_FTH

IF_ADD_INC

I²C_DIS

SWRESET

ONE_SHOT

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