PIC18LF8620 datasheet(61/380 Pages) MICROCHIP

61 / 380 page

 2004 Microchip Technology Inc.

DS39609B-page 59

PIC18F6520/8520/6620/8620/6720/8720

4.13

Status Register

The Status register, shown in Register 4-3, contains the

arithmetic status of the ALU. The Status register can be

the destination for any instruction, as with any other reg-

ister. If the Status register is the destination for an

instruction that affects the Z, DC, C, OV or N bits, then

the write to these five bits is disabled. These bits are set

or cleared according to the device logic. Therefore, the

result of an instruction with the Status register as

destination may be different than intended.

For example, CLRF STATUS will clear the upper three

bits and set the Z bit. This leaves the Status register as

000u u1uu

(where u = unchanged).

It is recommended, therefore, that only BCF, BSF,

SWAPF

, MOVFF and MOVWF instructions are used to alter

the Status register, because these instructions do not

affect the Z, C, DC, OV or N bits from the Status regis-

ter. For other instructions not affecting any status bits,

see Table 24-1.

STATUS REGISTER

Note:

The C and DC bits operate as a borrow

and

digit

borrow

bit

respectively,

subtraction.

U-0

R/W-x

—

—N

bit 7

bit 0

bit 7-5

Unimplemented: Read as ‘0’

bit 4

N: Negative bit

This bit is used for signed arithmetic (2’s complement). It indicates whether the result was

negative (ALU MSB = 1).

= Result was negative

= Result was positive

bit 3

OV: Overflow bit

This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the

7-bit magnitude, which causes the sign bit (bit 7) to change state.

= Overflow occurred for signed arithmetic (in this arithmetic operation)

= No overflow occurred

bit 2

Z: Zero bit

= The result of an arithmetic or logic operation is zero

= The result of an arithmetic or logic operation is not zero

bit 1

DC: Digit carry/borrow bit

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

= A carry-out from the 4th low-order bit of the result occurred

= No carry-out from the 4th low-order bit of the result

Note:

For borrow, the polarity is reversed. A subtraction is executed by adding the

2’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit

is loaded with either bit 4 or bit 3 of the source register.

bit 0

C: Carry/borrow bit

For ADDWF, ADDLW, SUBLW and SUBWF instructions:

= A carry-out from the Most Significant bit of the result occurred

= No carry-out from the Most Significant bit of the result occurred

Note:

For borrow, the polarity is reversed. A subtraction is executed by adding the

2’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit

is loaded with either the high or low-order bit of the source register.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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