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STL7N6LF3 Datasheet(PDF) 4 Page - STMicroelectronics |
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STL7N6LF3 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 15 page ![]() Electrical characteristics STL7N6LF3 4/15 DocID027038 Rev 4 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4: On/Off states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 250 μA 60 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 60 V 1 µA IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS , ID = 250 μA 1 2.5 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 3 A 35 43 mΩ VGS = 5 V, ID = 3 A 48 60 mΩ Table 5: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 25 V, f = 1 MHz, VGS = 0 V - 432 - pF Coss Output capacitance - 93 - Crss Reverse transfer capacitance - 10.5 - Qg Total gate charge VDD = 30 V, ID = 6.5 A, VGS = 0 to 10 V (see Figure 13: "Test circuit for gate charge behavior") - 8.7 - nC Qgs Gate-source charge - 1.9 - Qgd Gate-drain charge - 1.9 - RG Intrinsic gate resistance f =1 MHz, ID=0 A - 6.3 - Ω Table 6: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 30 V, ID = 3 A, RG = 4.7 Ω, VGS = 10 V (see Figure 12: "Test circuit for resistive load switching times" and Figure 17: "Switching time waveform") - 6.7 - ns tr Rise time - 10.4 - td(off) Turn-off delay time - 32.4 - tf Fall time - 5.4 - |
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