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ISO8200BQ Datasheet(PDF) 16 Page - STMicroelectronics |
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ISO8200BQ Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 37 page  Functional description ISO8200BQ 16/37 DocID027303 Rev 4 6 Functional description 6.1 Parallel interface Smart parallel interface built-in ISO8200BQ offers three interfacing signals easily managed by a microcontroller. The LOAD signal enables the input buffer storing the value of the channel inputs. The SYNC signal copies the input buffer value into the transmission buffer and manages the synchronization between low voltage side and the channel outputs on the isolated side. The OUT_EN signal enables the channel outputs. An internal refresh signal updates the configuration of the channel outputs with a frefresh frequency. This signal can be disabled forcing low the SYNC input when LOAD is high. SYNC and LOAD pins can be in direct control mode (DCM) or synchronous control mode (SCM). The operation of these two signals is described as follows: Table 12: Interface signal operation (general) LOAD SYNC OUT_EN Device behavior Don’t care Don’t care Low (1) The outputs are disabled (turned off) High High High The outputs are left unchanged Low High High The input buffer is enabled The outputs are left unchanged High Low High The internal refresh signal is disabled The transmission buffer is updated The outputs are left unchanged Low Low High The device operates in direct control mode as described in the respective paragraph Notes: (1)The outputs are turned off on OUT_EN falling edge and they are kept disabled as long as it is low. 6.1.1 Input signals (IN1 to IN8) Inputs from IN1 to IN8 are the driving signals of the corresponding OUT1 to OUT8 outputs. Data are direct loaded on related outputs if SYNC and LOAD inputs are low (DCM operation) or stored into input buffer when LOAD is low and SYNC is high. 6.1.2 Load input data LOAD The input is active low; it stores the data from IN1 to IN8 into the input buffer. |
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