PC87364-XXXSLASHVLA datasheet(10/180 Pages) NSC

10 / 180 page

Table of Contents (Continued)

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9.0

Legacy Functional Blocks

9.1

KEYBOARD AND MOUSE CONTROLLER (KBC) .................................................................. 149

9.1.1

General Description ................................................................................................... 149

9.1.2

KBC Register Map ..................................................................................................... 149

9.1.3

KBC Bitmap Summary ............................................................................................... 149

9.2

FLOPPY DISK CONTROLLER (FDC) ..................................................................................... 150

9.2.1

General Description ................................................................................................... 150

9.2.2

FDC Register Map ..................................................................................................... 150

9.2.3

FDC Bitmap Summary ............................................................................................... 151

9.3

PARALLEL PORT .................................................................................................................... 152

9.3.1

General Description ................................................................................................... 152

9.3.2

Parallel Port Register Map ......................................................................................... 152

9.3.3

Parallel Port Bitmap Summary .................................................................................. 153

9.4

UART FUNCTIONALITY (SP1 AND SP2) ............................................................................... 155

9.4.1

General Description ................................................................................................... 155

9.4.2

UART Mode Register Bank Overview ....................................................................... 155

9.4.3

SP1 and SP2 Register Maps for UART Functionality ................................................ 156

9.4.4

SP1 and SP2 Bitmap Summary for UART Functionality ........................................... 158

9.5

IR FUNCTIONALITY (SP2) ..................................................................................................... 160

9.5.1

General Description ................................................................................................... 160

9.5.2

IR Mode Register Bank Overview ............................................................................. 160

9.5.3

SP2 Register Map for IR Functionality ...................................................................... 161

9.5.4

SP2 Bitmap Summary for IR Functionality ................................................................ 162

10.0

Device Characteristics

10.1

GENERAL DC ELECTRICAL CHARACTERISTICS ............................................................... 164

10.1.1

Recommended Operating Conditions ....................................................................... 164

10.1.2

Absolute Maximum Ratings ....................................................................................... 164

10.1.3

Capacitance .............................................................................................................. 164

10.1.4

Power Consumption under Recommended Operating Conditions ............................ 165

10.2

DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ................................................ 165

10.2.1

Input, CMOS Compatible ........................................................................................... 165

10.2.2

Input, PCI 3.3V .......................................................................................................... 165

10.2.3

Input, SMBus Compatible .......................................................................................... 166

10.2.4

Input, Strap Pin .......................................................................................................... 166

10.2.5

Input, TTL Compatible ............................................................................................... 166

10.2.6

Input, TTL Compatible with Schmitt Trigger .............................................................. 166

10.2.7

Output, PCI 3.3V ....................................................................................................... 167

10.2.8

Output, Totem-Pole Buffer ......................................................................................... 167

10.2.9

Output, Open-Drain Buffer ......................................................................................... 167

10.2.10 Exceptions ................................................................................................................. 167

10.3

INTERNAL RESISTORS ......................................................................................................... 168

10.3.1

Pull-Up Resistor ......................................................................................................... 168

10.3.2

Pull-Down Resistor .................................................................................................... 168

PC87364-XXX/VLA Datasheet(PDF) 10 Page - National Semiconductor (TI)

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