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TNETV1647GSTZWT Datasheet(PDF) 226 Page - Texas Instruments |
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TNETV1647GSTZWT Datasheet(HTML) 226 Page - Texas Instruments |
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226 / 236 page  Valid MS_CLK MS_DATA 1 2 Valid MS_CLK MS_DATA MS_BS 3 4 5 6 8 10 11 13 9 7 12 TMS320DM6441 SPRS359E – SEPTEMBER 2006 – REVISED AUGUST 2010 www.ti.com Table 6-112. Timing Requirements for Memory Stick/Memory Stick PRO Parallel Interface (see Figure 6-78) 1.05 V 1.2 V NO. UNIT MIN MAX MIN MAX 1 tsu(DV-MSCLKf) Setup time, data valid before MS_CLK falling edge 6 ns 2 th(MCLKf-DV) Hold time, data valid after MS_CLK falling edge 2 2 ns Figure 6-78. Memory Stick/Memory Stick PRO Parallel Interface Input Timing Table 6-113. Switching Characteristics Over Recommended Operating Conditions for Memory Stick/Memory Stick PRO Parallel Interface (see Figure 6-79) 1.05 V 1.2 V NO. PARAMETER UNIT MIN MAX MIN MAX 3 f(MS_CLK) MS_CLK frequency 40 40 MHz 4 tw(MS_CLKH) Pulse duration, MS_CLK high 5 5 ns 5 tw(MS_CLKL) Pulse duration, MS_CLK low 5 5 ns 6 tf(MS_CLK) Fall time, MS_CLK 5 5 ns 7 tr(MS_CLK) Rise time, MS_CLK 5 5 ns 8 td(MS_CLK - MS_BSV) Delay time, MS_CLK falling edge to MS_BS valid 2 16 2 16 ns 9 tf(MS_BS) Fall time, MS_BS 5 5 ns 10 tr(MS_BS) Rise time, MS_BS 5 5 ns 11 td(MS_CLK - MS_DATxV) Delay time, MS_CLK falling edge to MS_DATx valid 2 16.6 2 16 ns 12 tf(MS_DATx) Fall time, MS_DATx 5 5 ns 13 tr(MS_DATx) Rise time, MS_DATx 5 5 ns Figure 6-79. Memory Stick/Memory Stick PRO Parallel Interface Output Timing 226 Peripheral and Electrical Specifications Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6441 |
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