T405T-6FP datasheet(5/9 Pages) STMICROELECTRONICS

5 / 9 page

T405T-6FP

Characteristics

DocID029919 Rev 1

5/9

Figure 7: Non repetitive surge peak on-state

current for a sinusoidal pulse with width tp < 10 ms

Figure 8: Relative variation of gate trigger current

and gate trigger voltage versus junction

temperature (typical values)

Figure 9: Relative variation of holding current and

latching current versus junction temperature

(typical values)

Figure 10: Relative variation of critical rate of

decrease of main current (dI/dt)c versus reapplied

(dV/dt)c

Figure 11: Relative variation of critical rate of

decrease of main current versus junction

temperature (typical values)

Figure 12: Relative variation of static dV/dt

immunity versus junction temperature

1.E-01

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

0.01

0.10

1.00

10.00

tP(ms)

Tj initial = 25 °C

TSM

ITSM(A)

(dI/dt)c [ (dV/dt)c ] / specified (dI/dt)c

0.0

0.2

0.4

0.6

0.8

1.0

1.2

0.1

1.0

10.0

100.0

(dV/dt)c (V/µs)

100

125

Tj(°C)

(dI/dt)

C [T j ] / (dI/dt)

c [T j = 125 °C]

100

125

Tj(°C)

dV/dt [T

j ] / dV/dt [T j = 125 °C]

D = VR = 402 V

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