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ST72561AR7-Auto Datasheet(PDF) 279 Page - STMicroelectronics |
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ST72561AR7-Auto Datasheet(HTML) 279 Page - STMicroelectronics |
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279 / 324 page ![]() ST72561-Auto Electrical characteristics Doc ID 12370 Rev 8 279/324 20.5 Clock and timing characteristics Subject to general operating conditions for VDD, fOSC, and TA. Figure 122. Typical application with an external clock source Table 102. General timings Symbol Parameter Conditions Min Typ(1) 1. Data based on typical application software. Max Unit tc(INST) Instruction cycle time 23 12 tCPU fCPU = 8 MHz 250 375 1500 ns tv(IT) Interrupt reaction time(2) tv(IT) = Δtc(INST) + 10 2. Time measured between interrupt event and interrupt vector fetch. Dtc(INST) is the number of tCPU cycles needed to finish the current instruction execution. 10 22 tCPU fCPU = 8 MHz 1.25 2.75 µs Table 103. External clock source Symbol Parameter Conditions Min Typ Max Unit VOSC1H OSC1 input pin high level voltage see Figure 122 0.7 x VDD -VDD V VOSC1L OSC1 input pin low level voltage VSS -0.3 x VDD tw(OSC1H) tw(OSC1L) OSC1 high or low time(1) 1. Data based on design simulation and/or technology characteristics, not tested in production. 25 - ns tr(OSC1) tf(OSC1) OSC1 rise or fall time(1) -5 IL OSCx Input leakage current VSS ≤VIN ≤VDD -±1 µA OSC1 OSC2 fOSC EXTERNAL ST72XXX CLOCK SOURCE Not connected internally VOSC1L VOSC1H tr(OSC1) tf(OSC1) tw(OSC1H) tw(OSC1L) IL 90% 10% |
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