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ST72561AR7-Auto Datasheet(PDF) 290 Page - STMicroelectronics

Part # ST72561AR7-Auto
Description  Clock, reset and supply management
PDF  324 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561AR7-Auto Datasheet(HTML) 290 Page - STMicroelectronics

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Electrical characteristics
ST72561-Auto
290/324
Doc ID 12370 Rev 8
Figure 134. Typical VOH vs VDD
20.10
Control pin characteristics
20.10.1
Asynchronous RESET pin
Subject to general operating conditions for VDD, fOSC, and TA unless otherwise specified.
34
56
Vdd(V)
2
3
4
5
6
-45°C
25°C
130°C
345
6
Vdd(V)
1
2
3
4
5
6
-45°C
25°C
130°C
Table 115.
RESET pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage(1)
0.3 x VDD
V
VIH
Input high level voltage(1)
0.7 x VDD
Vhys
Schmitt trigger voltage
hysteresis(2)
VDD =5V
1.5
VOL
Output low level voltage(3)
VDD =5V
IIO = +5mA
0.68
0.95
IIO = +2mA
0.28
0.45
RON
Weak pull-up equivalent
resistor(4)
VIN = VSS
20
40
80
k
Ω
tw(RSTL)out Generated reset pulse duration
Internal reset source
30
µs
th(RSTL)in
External reset pulse hold time(5)
2.5
tg(RSTL)in
Filtered glitch duration(6)
200
ns
1.
Data based on characterization results, not tested in production.
2.
Hysteresis voltage between Schmitt trigger switching levels.
3.
The IIO current sunk must always respect the absolute maximum rating specified in Section 20.2.2: Current characteristics
and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
4.
To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on the
RESET pin with a duration below th(RSTL)in can be ignored.
5.
The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in noisy
environments.
6.
Data guaranteed by design, not tested in production.



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