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STM32L151XE Datasheet(PDF) 61 Page - STMicroelectronics |
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STM32L151XE Datasheet(HTML) 61 Page - STMicroelectronics |
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61 / 134 page ![]() DocID025433 Rev 8 61/134 STM32L151xE STM32L152xE Electrical characteristics 113 6.3.2 Embedded reset and power control block characteristics The parameters given in the following table are derived from the tests performed under the conditions summarized in Table 13. TJ Junction temperature range 6 suffix version –40 105 °C 7 suffix version –40 110 1. When the ADC is used, refer to Table 55: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up . 3. To sustain a voltage higher than VDD+0.3V, the internal pull-up/pull-down resistors must be disabled. 4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJ max (see Table 71: Thermal characteristics on page 129). 5. In low-power dissipation state, TA can be extended to -40°C to 105°C temperature range as long as TJ does not exceed TJ max (see Table 71: Thermal characteristics on page 129). Table 13. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Table 14. Embedded reset and power control block characteristics Symbol Parameter Conditions Min Typ Max Unit tVDD(1) VDD rise time rate BOR detector enabled 0 - ∞ µs/V BOR detector disabled 0 - 1000 VDD fall time rate BOR detector enabled 20 - ∞ BOR detector disabled 0 - 1000 TRSTTEMPO(1) Reset temporization VDD rising, BOR enabled - 2 3.3 ms VDD rising, BOR disabled(2) 0.4 0.7 1.6 VPOR/PDR Power on/power down reset threshold Falling edge 1 1.5 1.65 V Rising edge 1.3 1.5 1.65 VBOR0 Brown-out reset threshold 0 Falling edge 1.67 1.7 1.74 Rising edge 1.69 1.76 1.8 VBOR1 Brown-out reset threshold 1 Falling edge 1.87 1.93 1.97 Rising edge 1.96 2.03 2.07 VBOR2 Brown-out reset threshold 2 Falling edge 2.22 2.30 2.35 Rising edge 2.31 2.41 2.44 |
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