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STM32F769AI Datasheet(PDF) 204 Page - STMicroelectronics

Part # STM32F769AI
Description  Dual mode Quad-SPI
PDF  255 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F769AI Datasheet(HTML) 204 Page - STMicroelectronics

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Electrical characteristics
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
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DocID029041 Rev 4
Table 108. Synchronous multiplexed NOR/PSRAM read timings(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Min
Max
Unit
tw(CLK)
FMC_CLK period
2THCLK 0.5
-
ns
td(CLKL-NExL) FMC_CLK low to FMC_NEx low (x=0..2)
-
2
td(CLKH_NExH) FMC_CLK high to FMC_NEx high (x= 0…2)
THCLK + 0.5
-
td(CLKL-NADVL) FMC_CLK low to FMC_NADV low
-
1.
td(CLKL-NADVH) FMC_CLK low to FMC_NADV high
0
-
td(CLKL-AV)
FMC_CLK low to FMC_Ax valid (x=16…25)
-
2.5
td(CLKH-AIV)
FMC_CLK high to FMC_Ax invalid (x=16…25)
THCLK
-
td(CLKL-NOEL) FMC_CLK low to FMC_NOE low
-
1.5
td(CLKH-NOEH) FMC_CLK high to FMC_NOE high
THCLK 0.5
-
td(CLKL-ADV)
FMC_CLK low to FMC_AD[15:0] valid
-
3
td(CLKL-ADIV) FMC_CLK low to FMC_AD[15:0] invalid
0
-
tsu(ADV-CLKH) FMC_A/D[15:0] valid data before FMC_CLK high
1.5
-
th(CLKH-ADV) FMC_A/D[15:0] valid data after FMC_CLK high
3.5
-
tsu(NWAIT-CLKH) FMC_NWAIT valid before FMC_CLK high
2
-
th(CLKH-NWAIT) FMC_NWAIT valid after FMC_CLK high
3.5
-



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