AS8C803601 datasheet(9/21 Pages) ALSC

9 / 21 page

99AS8C803601, AS8C801801, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with

ZBT™

™

Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs

Commercial Temperatur e Range

NOTES:

1. H = High; L = Low; X = Don’t Care; Z = High Impedance.

2. CE = L is defined as CE1 = L, CE2 = L and CE 2 = H. CE = H is defined as CE1 = H, CE2 = H or CE 2 = L.

Read Operation(1)

Device Operation - Showing Mixed Load, Burst,

Deselect and NOOP Cycles(2)

NOTES:

1. CE = L is defined as CE1 = L, CE2 = L and CE 2 = H. CE = H is defined as CE1 = H, CE2 = H or CE 2 = L.

2. H = High; L = Low; X = Don’t Care; Z = High Impedance.

CycleAddressR/W

ADV/LD

CE(1)

CEN

I/O

Comments

nA0

Load read

n+1

Burst read

n+2

Load read

n+3

Q0+1 Deselect or STOP

n+4

NOOP

n+5

Load read

n+6

Burst read

n+7

Deselect or STOP

n+8

LLLL

Q2+1 Load write

n+9

Burst write

n+10

LLL

Load write

n+11

D3+1 Deselect or STOP

n+12

NOOP

n+13

Load write

n+14

Load read

n+15

LLL

Load write

n+16

Burst write

n+17

Load read

n+18

D7+1 Burst read

n+19

LLLL

Load write

5304tbl 12

CycleAddressR/W

ADV/LD

CE(2)

CEN

I/O

Comments

nA0

Address and Control meet setup

n+1

XXX

Clock

etup

alid

n+2

XXX

Contents of Address A0 Re ad Out

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