Functional Description

The MM5486 is specifically designed to operate four-digit

alphanumeric displays with minimal interface with the dis-

play and the data source Serial data transfer from the data

source to the display driver is accomplished with 3 signals

serial data clock and load The data bits are latched by a

positive-level load signal thus providing non-multiplexed di-

rect drive to the display When load is high the data in the

shift registers is displayed on the output drivers Outputs

change only if the serial data bits differ from the previous

time Display brightness is determined by control of the out-

put current for LED displays A 0001 mF capacitor should

be connected to brightness control pin 19 to prevent possi-

ble oscillations The output current is typically 20 times

greater than the current into pin 19 which is set by an exter-

nal variable resistor There is an internal limiting resistor of

400X nominal value

A block diagram is shown in

Figure 1

Figure 4 shows the input data format Bit ‘‘1’’ is the first bit

into the data input pin and it will appear on pin 17 A logical

‘‘1’’ at the input will turn on the appropriate LED The load

signal latches the 33 bits of the shift register into the latch-

es The data out pin allows for cascading the shift registers

for more than 33 output drivers

When the chip first powers ON an internal power ON reset

signal is generated which resets all registers and latches

The leading clock returns the chip to its normal operation

Figure 3 shows the timing relationship between data clock

and data enable A maximum clock frequency of 05 MHz is

assumed

For applications where a lesser number of outputs are used

it is possible to either increase the current per output or

equation can be used for calculations

where

The above equation was used to plot

Figure 6 Figure 7 and

Figure 8

TLF6142 – 3

FIGURE 3

TLF6142 – 4

This leading clock is necessary only after power ON

FIGURE 4 Input Data Format

TLF6142 – 5

FIGURE 5

3