| Electronic Components Datasheet Search |
|
NAND01GR3A Datasheet(PDF) 15 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
NAND01GR3A Datasheet(HTML) 15 Page - STMicroelectronics |
|
15 / 57 page ![]() 15/57 NAND128-A, NAND256-A, NAND512-A, NAND01G-A MEMORY ARRAY ORGANIZATION The memory array is made up of NAND structures where 16 cells are connected in series. The memory array is organized in blocks where each block contains 32 pages. The array is split into two areas, the main area and the spare area. The main area of the array is used to store data whereas the spare area is typically used to store Error correction Codes, software flags or Bad Block identification. In x8 devices the pages are split into a main area with two half pages of 256 Bytes each and a spare area of 16 Bytes. In the x16 devices the pages are split into a 256 Word main area and an 8 Word spare area. Refer to Figure 10., Memory Array Or- ganization. Bad Blocks The NAND Flash 528 Byte/ 264 Word Page devic- es may contain Bad Blocks, that is blocks that con- tain one or more invalid bits whose reliability is not guaranteed. Additional Bad Blocks may develop during the lifetime of the device. The Bad Block Information is written prior to ship- ping (refer to Bad Block Management section for more details). Table 4. shows the minimum number of valid blocks in each device. The values shown include both the Bad Blocks that are present when the de- vice is shipped and the Bad Blocks that could de- velop later on. These blocks need to be managed using Bad Blocks Management, Block Replacement or Error Correction Codes (refer to SOFTWARE ALGO- RITHMS section). Table 4. Valid Blocks Figure 10. Memory Array Organization Density of Device Min Max 1Gbit 8032 8192 512Mbits 4016 4096 256Mbits 2008 2048 128Mbits 1004 1024 AI07587 Block = 32 Pages Page = 528 Bytes (512+16) 512 Bytes 512 Bytes Spare Area 2nd half Page (256 bytes) 16 Bytes Block 8 bits 16 Bytes 8 bits Page Page Buffer, 512 Bytes 1st half Page (256 bytes) Block = 32 Pages Page = 264 Words (256+8) 256 Words 256 Words Spare Area Main Area 8 Words 16 bits 8 Words 16 bits Page Buffer, 264 Words Block Page x8 DEVICES x16 DEVICES |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |