RX24T datasheet(93/133 Pages) RENESAS

93 / 133 page

R01DS0257EJ0200 Rev.2.00

Page 93 of 133

Apr 14, 2017

RX24T Group

5. Electrical Characteristics

5.3.2

Reset Timing

Note 1. When IWDTCR.CKS[3:0] = 0000b.

Figure 5.29

Reset Input Timing at Power-On

Figure 5.30

Reset Input Timing (1)

Figure 5.31

Reset Input Timing (2)

Table 5.17

Reset Timing

Conditions: VCC = 2.7 V to 5.5 V, AVCC0 = AVCC1 = AVCC2 = VREF = VCC to 5.5 V, VSS = AVSS0 = AVSS1 = AVSS2 =

0 V, Ta = –40 to +85°C

Item

Symbol

Min.

Typ.

Max.

Unit

Test Conditions

RES# pulse width

At power-on

tRESWP

—

Figure 5.29

Other than above

tRESW

—

μs

Figure 5.30

Wait time after RES# cancellation (at power-on)

tRESWT

—

27.5

—

Figure 5.29

Wait time after RES# cancellation

(during powered-on state)

tRESWT

—

114

—

μs

Figure 5.30

Independent watchdog timer reset period

tRESWIW

—

IWDT clock

cycle

Figure 5.31

Software reset period

tRESWSW

—

ICLK cycle

Wait time after independent watchdog timer reset cancellation*1

tRESW2

—

300

—

μs

Wait time after software reset cancellation

tRESW2

—

168

—

μs

VCC

RES#

tRESWP

Internal reset

tRESWT

RES#

Internal reset

tRESWT

tRESW

Independent watchdog timer reset

Software reset

Internal reset

tRESWT2

tRESWIW, tRESWSW

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