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HT82M9BA Datasheet(PDF) 7 Page - Holtek Semiconductor Inc |
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HT82M9BA Datasheet(HTML) 7 Page - Holtek Semiconductor Inc |
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7 / 44 page ![]() HT82M9BE/HT82M9BA Rev. 1.80 7 December 22, 2008 data as defined by TBLP and the current program counter bits. Stack Register - STACK This is a special part of the memory which is used to save the contents of the program counter only. The stack is organized into 8 levels and is neither part of the data nor part of the program space, and is neither read- able nor writeable. The activated level is indexed by the stack pointer (SP) and is neither readable nor writeable. At a subroutine call or interrupt acknowledge signal, the contents of the program counter are pushed onto the stack. At the end of a subroutine or an interrupt routine, signaled by a return instruction (RET or RETI), the pro- gram counter is restored to its previous value from the stack. After a chip reset, the SP will point to the top of the stack. If the stack is full and a non-masked interrupt takes place, the interrupt request flag will be recorded but the acknowledge signal will be inhibited. When the stack pointer is decremented (by RET or RETI), the interrupt will be serviced. This feature prevents stack overflow al- lowing the programmer to use the structure more easily. In a similar case, if the stack is full and a ²CALL² is sub- sequently executed, stack overflow occurs and the first entry will be lost (only the most recent 4 return ad- dresses are stored). Data Memory - RAM for Bank 0 The data memory is designed with 224 ´8 bits. The data memory is divided into two functional groups: special function registers and general purpose data memory (224 ´8). Most are read/write, but some are read only. The unused spaces before the 20H is reserved for fu- ture expanded usage and reading these locations will get ²00H². The general purpose data memory, ad- dressed from 20H to FFH, is used for data and control information under instruction commands. All of the data memory areas can handle arithmetic, logic, increment, decrement and rotate operations di- rectly. Except for some dedicated bits, each bit in the data memory can be set and reset by ²SET [m].i² and ²CLR [m].i². They are also indirectly accessible through memory pointer registers (MP0 or MP1). Data Memory - RAM for Bank 1 The special function registers used in the USB interface are located in RAM Bank1. In order to access Bank1 register, only the Indirect addressing pointer MP1 can be used and the Bank register BP should be set to 1. The RAM bank 1 mapping is as shown. Address 00~1FH in RAM Bank0 and Bank1 are located in the same Registers Indirect Addressing Register Locations 00H and 02H are indirect addressing regis- ters that are not physically implemented. Any read/write operation on [00H] ([02H]) will access the data memory pointed to by MP0 (MP1). Reading location 00H (02H) indirectly will return the result 00H. Writing indirectly re- sults in no operation. The indirect addressing pointer (MP0) always points to Bank0 RAM addresses no matter the value of Bank Register (BP). The indirect addressing pointer (MP1) can access Bank0 or Bank1 RAM data according to the value of BP which is set to ²0² or ²1² respectively. The memory pointer registers (MP0 and MP1) are 8-bit registers. 0 0 H 0 1 H 0 2 H 0 3 H 0 4 H 0 5 H 0 6 H 0 7 H 0 8 H 0 9 H 0 A H 0 B H 0 C H 0 D H 0 E H 0 F H 1 0 H 1 1 H 1 2 H 1 3 H 1 4 H 1 5 H 1 6 H 1 7 H 1 8 H G e n e r a l P u r p o s e D a t a M e m o r y ( 2 2 4 B y t e s ) 1 A H 1 B H 1 C H 1 D H 1 E H 1 F H F F H 2 0 H I n d i r e c t A d d r e s s i n g R e g i s t e r 0 M P 0 I n d i r e c t A d d r e s s i n g R e g i s t e r 1 M P 1 B P A C C P C L T B L P T B L H W D T S S T A T U S I N T C T M R 0 T M R 0 C T M R 1 H T M R 1 L T M R 1 C P A P A C P B P B C P C P C C U S C U S R S C C T B H P B a n k 0 1 9 H Bank 0 RAM Mapping |
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