WM8232 datasheet(51/141 Pages) CIRRUS

51 / 141 page

WM8232

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R24 (18h) PG

width 2

7:0

PGWIDTH2[7:0]

0000_0000

parameter of pattern generator

OVERALL

Figure 38 shows the overall procedure for WM8232 register setting. Every register can be configured

without MCLK and TGSYNC input, but the following Note1~3 must be followed before starting normal

operation.

Sampling

configuration(*4)

Data output

configuration

Offset DAC

configuration

PGA

configuration

TG Clock/Pulse

configuration

PLL/DLL

Configuration(*3)

POWER ON

System Reset (*3)

Present External clock

MCLK (*1), TGSYNC (*2)

NORMAL OPERATION

Clamp

configuration

VRLC

configuration

Figure 38 Overall Procedure

Notes:

MCLK must be present before System Reset. Also, System Reset must be done when MCLK is

interrupted during normal operation.

TGSYNC input is required in TG slave mode. Also, this must be present before normal operation.

System Reset must be done after PLL/DLL configuration.

WM8232 Datasheet(PDF) 51 Page - Cirrus Logic

WM8232 Datasheet(HTML) 51 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL